Intel 440GX manual Manageability Devices, 3.18.1 Max1617 Temperature Sensor, Design Checklist

Models: 440GX

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3.18Manageability Devices

Design Checklist

PIIX4E. For ACPI compliance, this signal must be connected to the IOAPIC. There are two different routing options:

INTIN9: IRQ9OUT# can be connected to INTIN9 on the IOAPIC. The ACPI BIOS will report to the OS that the SCI uses IRQ9 for both PIC and APIC enabled platforms. However, for this solution ISA IRQ9 must be left unconnected. The could create an ISA legacy incompatibility with ISA cards that must only use IRQ9. Note that this conflict exists in all PIC enabled systems. The PIIX4E automatically masks ISA IRQ9 when SCI_EN is set.

INTIN20 - INTIN22: IRQ9OUT# can be connected to any available IOAPIC interrupt (e.g. INTIN20-INTIN22 or INTIN13). This solution eliminates the IRQ9 ISA legacy conflict described in the INTIN9 routing option. However, this routing option creates a new issue. The ACPI BIOS needs to report to the OS which interrupt is used to generate an SCI. In a PIC enabled OS (like Windows 98*) the platform would use the PIIX4E internal IRQ9. In an APIC enabled OS (like NT) the platform would use INTIN20, for example. The ACPI BIOS has the job of telling the OS which one to use, but the BIOS does not know which OS will load. If the platform only supports an APIC enabled OS (Windows NT*-only) there is no issue since the BIOS will just report IRQ20. If the platform needs to support both PIC and APIC operating systems (NT & Windows 98*), the BIOS will require a setup screen option that selects between APIC OS (IRQ20) and PIC OS (IRQ9) so the BIOS can properly report to the OS which interrupt is assigned to the SCI.

The SMI# signal from the PIIX4/PIIX4E should be connected directly to both processors in a DP system. The option to generate an SMI using the SMIOUT# signal from the IOAPIC is not recommended because of timing delays through the IOAPIC.

3.18Manageability Devices

3.18.1Max1617 Temperature Sensor

Sensing temperature on the Slot1 processor is provided by the THRMDP# and THRMDN# signals. These are connected to a thermal diode on the processor core.

Consult the MAX1617 data sheet for the manufacturer’s specifications and layout recommendations for using this device.

D+ and D- are used to connect to the Slot 1 pins B14 and B15 respectively. The MAX1617 measures changes in the voltage drop across the diode and converts the drop into a temperature reading. An external NPN transistor, connected as a diode may be used on an external cable as well.

3.18.2LM79 Microprocessor System Hardware Monitor

Consult the LM79 data sheet for the manufacturer’s specifications and recommendations for using this device.

ISA bus interface signals allow access to internal status and control registers such as POST codes and RAM which stores A/D information. The LM79 internal registers are accessed by writing a register offset value to IO address 05h followed by a read of IO address 06h.

VID[4:0]: These inputs allow storage of the voltage identification pin bits for Intel® Pentium® II processors to allow the BIOS to record voltage specification variations.

Fan inputs can be used with system fans having tachometer outputs.

Intel®440GX AGPset Design Guide

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Intel 440GX Manageability Devices, 3.18.1 Max1617 Temperature Sensor, 3.18.2 LM79 Microprocessor System Hardware Monitor