Introduction to Programming - 4

*OPC

This sets the OPC status bit when all pending operations have completed. Since your

 

program can read this status bit on an interrupt basis, *OPC allows subsequent

 

commands to be executed.

 

 

NOTE:

The trigger subsystem must be in the Idle state for the status OPC bit to be true. As far

 

as triggers are concerned, OPC is false whenever the trigger subsystem is in the Initiated

 

state.

 

 

OUTPUT:STATE Example

OUTPUT:STATE ON starts a sequence of operations in the unit that closes the output and sense relays and sets the output voltage and current at the user’s settings. It is often important to know when these parallel operations are finished, so that the next step in a test sequence can be synchronized with the completion of a power supply command.

Two types of synchronization are provided:

External synchronization is required when the test system needs to control something other than the power supply after the power supply has finished all previous sent commands. External synchronization is provided by the *OPC? Query and the *OPC command. The *OPC? Query returns the value 1 when all pending operations are completed. The GPIB will be held up waiting for the response to the query until this occurs. The *OPC command will cause bit 0 of the standard event status register to be set when all pending operations are completed. The controller can either poll for this status bit or set up an SRQ when this occurs.

Internal synchronization is required when the test system needs to change a power supply setting or make a power supply internal measurement after the supply has finished all previous sent commands. Internal synchronization is provided by the *WAI command. When the power supply receives the *WAI command, it holds up processing of any further bus commands until all pending parallel operations are completed. For example, the *WAI command can be used to make a current measurement after an output on command has completed:

OUTPUT ON,(@1);*WAI;:MEAS:CURR 0.5,(@1)

Using Device Clear

You can send a device clear at any time abort a SCPI command that may be hanging up the GPIB interface. The status registers, the error queue, and all configuration states are left unchanged when a device clear message is received. Device clear performs the following actions:

The input and output buffers of the dc source are cleared.

The dc source is prepared to accept a new command string.

The following statement shows how to send a device clear over the GPIB interface using Agilent BASIC:

CLEAR 705 IEEE-488 Device Clear

The following statement shows how to send a device clear over the GPIB interface using the GPIB command library for C or QuickBASIC:

IOCLEAR (705)

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Agilent Technologies N3280A manual Using Device Clear, Outputstate Example