Language Dictionary - 6

*RST

This command resets the dc source to a factory-defined state as defined in the following table. *RST also forces an ABORt command.

Table 6-7. *RST Settings

CAL:STAT

OFF

[SOUR:]CURR:LIM

1E−3

OUTP

OFF

[SOUR:]CURR:LIM:TRIG

1E−3

OUTP:OSCP

ON

[SOUR:]CURR:LIM:BWID

30000

SENS:CURR:RANG

.5

[SOUR:]CURR:LIM:MODE

FIXed

SENS:FUNC

VOLT

[SOUR:]FUNC:MODE

VOLT

SENS:SWE:NPLC

.00912 (60 Hz);

[SOUR:]DEL

0

 

.0076 (50 Hz)

[SOUR:]DEL:MODE

AUTO

SENS:SWE:POIN

5

[SOUR:]VOLT:ALC:BWID

30000

SENS:SWE:OFFS:POIN

0

[SOUR:]VOLT

0

SENS:SWE:TINT

30.4E−6

[SOUR:]VOLT:TRIG

0

SENS:WIND

RECTangular

[SOUR:]VOLT:MODE

FIXed

[SOUR:]CURR

0

[SOUR:]VOLT:PROT:STAT

ON

[SOUR:]CURR:TRIG

0

TRIG:ACQ:SOUR

BUS

[SOUR:]CURR:MODE

FIXed

TRIG:SOUR

BUS

Command Syntax

*RST

 

 

Parameters

None

 

 

*SRE

This command sets the condition of the Service Request Enable Register. This register determines which bits from the Status Byte Register (see *STB for its bit configuration) are allowed to set the Master Status Summary (MSS) bit and the Request for Service (RQS) summary bit. A 1 in any Service Request Enable Register bit position enables the corresponding Status Byte Register bit and all such enabled bits then are logically ORed to cause Bit 6 of the Status Byte Register to be set.

When the controller conducts a serial poll in response to SRQ, the RQS bit is cleared, but the MSS bit is not. When *SRE is cleared (by programming it with 0), the dc source cannot generate an SRQ to the controller. The query returns the current state of *SRE.

Command Syntax

*SRE <NRf>

Parameters

0 to 255

Power-on Value

0

Example

*SRE 20

Query Syntax

*SRE?

Returned Parameters

<NR1> (register binary value)

Related Commands

*ESE *ESR

*STB?

This query reads the Status Byte register, which contains the status summary bits and the Output Queue MAV bit. Reading the Status Byte register does not clear it. The input summary bits are cleared when the appropriate event registers are read. The MAV bit is cleared at power-on, by *CLS' or when there is no more response data available.

A serial poll also returns the value of the Status Byte register, except that bit 6 returns Request for Service (RQS) instead of Master Status Summary (MSS). A serial poll clears RQS, but not MSS. When MSS is set, it indicates that the dc source has one or more reasons for requesting service.

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Agilent Technologies N3280A manual Power-on Value, RST Settings