Chapter 3 Hardware
38 Reference Manual CoreModule 420
Video (LCD/CRT) Interface (J11)The STPC Atlas chip provides the 2D graphics controller for the video signals to a flat panel display and
traditional glass CRT monitor. The features are listed below:
•Enhanced 2D Graphics Controller
♦Supports Pixel Depths of 8, 16, 24 and 32 bit
♦Full BitBLT Implementation for all 256 Raster Operations Defined for Windows
♦Supports 4 Transparent BLT Modes
•Bitmap Transparency
•Pattern Transparency
•Source Transparency
•Destination Transparency
♦Hardware Clipping
♦Fast Line Draw Engine with anti-aliasing
♦Fast Triangle Fill Engine
♦Supports 4-bit Alpha Blend Font for anti-aliased text display
♦Complete Double Buffered Registers for pipelined operation
♦64-bit wide Pipelined Architecture running at 100MHz
♦Video memory up to 4MB; selected in BIOS Setup
•CRT Controller
♦Integrated 135MHz triple RAMDAC allowing for 1280 x 1024 x 75Hz display
♦Supports 8-, 16-, and 24-bit pixels
♦Interlaced or non-interlaced output
•TFT Display Controller
♦Conforms with VESA Flat Panel Display Interface FPDI-1B
♦Supports both 4/3 and 16/9 screen size ratio
♦Supports up to 1024 x 768 pixel display resolutions
♦Uses Internal CRTC Controller for display modes settings
♦Supports VGA and SVGA active matrix panels with 9-, 12-, 18-bit Interface (1 pixel/clock)
♦Supports XGA and SXGA active matrix panels with 2x9-bit Interface (2 pixels/clock)
♦Programmable image position and size
♦Programmable blank space insertion in text mode
♦Programmable horizontal and vertical image expansion in graphic mode
♦Two fully programmable PWM (Pulse Width Modulator) signals to adjust the flat panel
brightness and contrast.
♦Supports PanelLink high speed serial transmitter externally for high resolution panel
interface.
The video interface (LCD/CRT) uses a 44-pin 2mm header with pin outs shown in Table 3-17.