Chapter 3 |
| Hardware | |
Table | |||
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| Pin # | Signal | Description |
| 1 | TFTDCLK | TFT Shift Clock – This clock signal provides the timing for transferring digital |
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| pixel data. |
| 2 | TFTDE | TFT Data Enable – This signal indicates valid data on any of the FP [23:0] lines. |
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| 3 | TFTLP | TFT Line Pulse – This signal is the digital monitor equivalent of HSYNC. |
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| 4 | TFTFrame | TFT Frame Marker – This signal is the TFT monitor equivalent of VSYNC. |
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| 5 | GND | Digital Ground |
| 6 | GND | Digital Ground |
| 7 | NC | Not connected (FP0 = Panel Data 0) |
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| 8 | NC | Not connected (FP1 = Panel Data 1) |
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| 9 | FP2 | Panel Data 2 – These pins (0 to 23) provides Digital pixel data output signals. |
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| 10 | FP3 | Panel Data 3 – Refer to pin 9, FP2, for more information. |
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| 11 | FP4 | Panel Data 4 – Refer to pin 9, FP2, for more information. |
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| 12 | FP5 | Panel Data 5 – Refer to pin 9, FP2, for more information. |
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| 13 | FP6 | Panel Data 6 – Refer to pin 9, FP2, for more information. |
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| 14 | FP7 | Panel Data 7 – Refer to pin 9, FP2, for more information. |
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| 15 | NC | Not connected (FP8 = Panel Data8) |
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| 16 | NC | Not connected (FP9 = Panel Data 9) |
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| 17 | FP10 | Panel Data 10 – Refer to pin 9, FP2, for more information. |
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| 18 | FP11 | Panel Data 11 – Refer to pin 9, FP2, for more information. |
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| 19 | FP12 | Panel Data 12 – Refer to pin 9, FP2, for more information. |
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| 20 | FP13 | Panel Data 13 – Refer to pin 9, FP2, for more information. |
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| 21 | FP14 | Panel Data 14 – Refer to pin 9, FP2, for more information. |
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| 22 | FP15 | Panel Data 15 – Refer to pin 9, FP2, for more information. |
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| 23 | NC | Not connected (FP16 = Panel Data 16) |
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| 24 | NC | Not connected (FP17 = Panel Data 17) |
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| 25 | FP18 | Panel Data 18 – Refer to pin 9, FP2, for more information. |
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| 26 | FP19 | Panel Data 19 – Refer to pin 9, FP2, for more information. |
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| 27 | FP20 | Panel Data 20 – Refer to pin 9, FP2, for more information. |
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| 28 | FP21 | Panel Data 21 – Refer to pin 9, FP2, for more information. |
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| 29 | FP22 | Panel Data 22 – Refer to pin 9, FP2, for more information. |
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| 30 | FP23 | Panel Data 23 – Refer to pin 9, FP2, for more information. |
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| 31 | TFTEnVcc | TFT Power (Vcc) – This signal is the power to Flat panel displays. |
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| 32 | TFTEnVee | TFT Voltage Enable (Vee) – This signal enables power to Flat panel displays. |
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| 33 | +PNLVdd | Voltage (+3.3 or +5 volts ±5%) depends on setting of JP6. |
| 34 | +12V Out | +12 volts ±5% |
| 35 | GND | Digital Ground |
| 36 | GND | Digital Ground |
| 37 | HSYNC | Horizontal Sync – This signal is used for the digital horizontal sync output to |
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| the CRT. Also used (with VSYNC) to signal power management state |
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| information to the CRT per the VESA DPMS standard. |
CoreModule 420 | Reference Manual | 39 |
