ARM CM940T 3.3Core module FPGA

Hardware Description

3.3Core module FPGA

The core module FPGA contains five main functional blocks:

•SDRAM controller on page 3-6

•Reset controller on page 3-8

•System bus bridge on page 3-11

•Core module registers on page 4-7

•Debug interrupt controller, see Debug communications interrupts on page 3-27.

The FPGA provides sufficient functionality for the core module to operate as a standalone development system, although with limited capabilities. System bus arbitration, system interrupt control, and input/output resources are provided by the system controller FPGA on the motherboard. See the user guide for your motherboard for further information.

Figure 3-1illustrates the function of the core module FPGA and shows how it connects to the other devices in the system.

	Clock	Status/	Reset
SSRAM		control
	generator		controller
		registers

Memory bus

SDRAM

SDRAM

controller

SSRAM
			System bus
controller	ARM core
(PLD)			bridge
					FPGA
				System bus
		System bus connectors
	Multi-ICE		HDRA/HDRB

Figure 3-1 FPGA functional diagram

3-4 © Copyright ARM Limited 1999. All rights reserved. ARM DUI 0125A