Programmer’s Reference

System bus accesses to SDRAM

If the core module is mounted on a motherboard, the SDRAM is mapped to appear at the aliased module memory region of the combined Integrator system bus memory map. The SDRAM can be accessed by all bus masters at its alias location, and accessed by the local processor at both its local and alias locations.

The system bus address for a core module is automatically controlled by its position in the stack (see Core module ID on page 2-6). Figure 4-3shows the local and alias address of the SDRAM on four core modules.

System bus address

 

Local address

0xBFFFFFFF

 

 

 

0x0FFFFFFF

 

 

SDRAM

 

 

 

Module 3

 

 

 

core module 3

 

 

 

 

0xB0000000

 

 

 

0x00000000

0xAFFFFFFF

 

 

0x0FFFFFFF

 

SDRAM

 

 

 

Module 2

 

 

 

core module 2

 

 

 

 

0xA0000000

 

 

0x00000000

All masters

 

 

0x9FFFFFFF

 

 

0x0FFFFFFF

 

 

SDRAM

 

 

 

Module 1

 

 

 

core module 1

 

 

 

 

0x90000000

 

 

 

0x00000000

0x8FFFFFFF

 

 

0x0FFFFFFF

 

 

SDRAM

 

 

 

Module 0

 

 

 

core module 0

 

 

 

 

0x80000000

 

 

 

0x00000000

Figure 4-3 Core module local and alias addresses

By reading the CM_STAT register, a processor can determine which core module it is on and, therefore, the alias location of its own SDRAM (see CM_STAT (0x10000010) on page 4-12).

ARM DUI 0125A

© Copyright ARM Limited 1999. All rights reserved.

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