Hardware Description
3.8.4Debug communications interruptsThe ARM940T processor core incorporates EmbeddedICE hardware and provides a debug communications data register which is used to pass data between the processor and JTAG equipment. The processor accesses this register as a normal
Interrupts can be used to signal when data has been written into one side of the register and is available for reading from the other side. These interrupts are supported by the interrupt controller within the core module FPGA and can be enabled and cleared by accessing the interrupt registers (see Interrupt registers on page
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