Cypress 37000 CPLD manual CY37128/CY37128V, CY37192/CY37192V

Ultra37000 CPLD Family

Logic Block Diagrams (continued)

CY37128/CY37128V	CLOCK	TDI
		TCK
INPUTS	INPUTS	TMS

JTAG Tap Controller

TDO

				1		4
			INPUT			INPUT/CLOCK		JTAGEN
			MACROCELL			MACROCELLS
			4				4
		16 I/Os	LOGIC				LOGIC	16 I/Os
	I/O0–I/O15		BLOCK	36		36	BLOCK	I/O112–I/O127
			A	16	PIM	16	H
		16 I/Os	LOGIC	36		36	LOGIC	16 I/Os
	I/O16–I/O31		BLOCK				BLOCK	I/O96–I/O111
			B	16		16	G
		16 I/Os	LOGIC				LOGIC	16 I/Os
	I/O32–I/O47		BLOCK	36		36	BLOCK	I/O80–I/O95
			C	16		16	F
		16 I/Os	LOGIC	36		36	LOGIC	16 I/Os
	I/O28–I/O63		BLOCK				BLOCK	I/O64–I/O79
			D	16		16	E
			64				64
CY37192/CY37192V						Clock/
					Input	Input
					1	4
			4	36		36	4
		10 I/Os	LOGIC				LOGIC	10 I/Os
		I/O0–I/O9	BLOCK	16		16	BLOCK	I/O110–I/O119
			A				L
		10 I/Os	LOGIC	36		36	LOGIC	10 I/Os
		I/O10–I/O19	BLOCK	16		16	BLOCK	I/O100–I/O109
			B	36		36	K
		10 I/Os	LOGIC				LOGIC	10 I/Os
		I/O20–I/O29	BLOCK	16		16	BLOCK	I/O90–I/O99
			C	36	PIM	36	J
		10 I/Os	LOGIC				LOGIC	10 I/Os
				16		16
		I/O30–I/O39	BLOCK				BLOCK	I/O80–I/O89
			D	36		36	I
		10 I/Os	LOGIC				LOGIC	10 I/Os
				16		16
		I/O40–I/O49	BLOCK				BLOCK	I/O70–I/O79
			E	36		36	H
		10 I/Os	LOGIC				LOGIC	10 I/Os
				16		16
		I/O50–I/O59	BLOCK				BLOCK	I/O60–I/O69
			F				G
TDI	JTAG Tap		60				60
TCK		TDO
	Controller
TMS

Document #: 38-03007 Rev. *E Page 10 of 64

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