Ultra37000 CPLD Family

Typical 3.3V Power Consumption (continued)

CY37192V

 

1 2 0

 

 

 

 

 

 

 

1 0 0

 

 

 

 

H ig h S p e e d

 

 

 

 

 

 

 

 

 

8 0

 

 

 

 

 

 

 

 

 

 

L o w P o w e r

 

 

 

(mA)

6 0

 

 

 

 

 

 

Icc

 

 

 

 

 

 

 

 

4 0

 

 

 

 

 

 

 

2 0

 

 

 

 

 

 

 

0

 

 

 

 

 

 

 

0

2 0

4 0

6 0

8 0

1 0 0

1 2 0

 

 

 

 

F re q u e n c y (M H z )

 

 

 

The typical pattern is a 16-bit up counter, per logic block, with outputs disabled.

VCC = 3.3V, TA = Room Temperature

CY37256V

1 4 0

 

 

 

 

 

 

1 2 0

 

 

 

 

H ig h S p e e d

 

 

 

 

 

 

 

1 0 0

 

 

 

 

 

 

8 0

 

 

L o w P o w e r

 

 

 

 

 

 

 

 

 

Icc (mA)

 

 

 

 

 

 

6 0

 

 

 

 

 

 

4 0

 

 

 

 

 

 

2 0

 

 

 

 

 

 

0

 

 

 

 

 

 

0

2 0

4 0

6 0

8 0

1 0 0

1 2 0

 

 

 

F re q u e n c y (M H z )

 

 

 

The typical pattern is a 16-bit up counter, per logic block, with outputs disabled.

VCC = 3.3V, TA = Room Temperature

Document #: 38-03007 Rev. *E

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Cypress 37000 CPLD manual Typical 3.3V Power Consumption CY37192V, CY37256V