Cypress 37000 CPLD manual Typical 5.0V Power Consumption CY37128, CY37192

Ultra37000 CPLD Family

Typical 5.0V Power Consumption (continued)

CY37128

	1 6 0
	1 4 0								H igh S pe ed
	1 2 0
	1 0 0
(mA)						Lo w P ow er
	8 0
Icc
	6 0
	4 0
	2 0
	0
	0	2 0	4 0	6 0	8 0	1 0 0	1 2 0	1 4 0	1 6 0	1 8 0

Frequency (M H z)

The typical pattern is a 16-bit up counter, per logic block, with outputs disabled.

VCC = 5.0V, TA = Room Temperature

CY37192

	3 0 0
	2 5 0								H igh S p ee d
	2 0 0
(mA)	1 5 0					L ow P o w e r
Icc
	1 0 0
	5 0
	0
	0	2 0	4 0	6 0	8 0	1 0 0	1 2 0	1 4 0	1 6 0	1 8 0

Frequency (M H z)

The typical pattern is a 16-bit up counter, per logic block, with outputs disabled.

VCC = 5.0V, TA = Room Temperature

Document #: 38-03007 Rev. *E Page 25 of 64

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