Cypress 37000 CPLD Logic Block Diagrams

Ultra37000 CPLD Family
Document #: 38-03007 Rev. *E Page 9 of 64
Logic Block Diagrams
CY37032/CY37032V
LOGIC
BLOCK
B
LOGIC
BLOCK
A
36
16
36
16
Input
Clock/
Input
16 I/Os 16 I/Os
I/O0−I/O15 I/O16−I/O31
4
4
4
16
16
TDI
TCK
TMS TDO
JTAG Tap
Controller
1
PIM
JTAGEN
LOGIC
BLOCK
D
LOGIC
BLOCK
C
LOGIC
BLOCK
A
LOGIC
BLOCK
B
36
16
36
16
36
16
36
16
Input
Clock/
Input
16 I/Os
16 I/Os
16 I/Os
16 I/Os
I/O0-I/O15
I/O16-I/O31
I/O48-I/O63
I/O32-I/O47
4
4
4
32
32
TDI
TCK
TMS
TDO
JTAG Tap
Controller
1
PIM
CY37064/CY37064V
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