Ultra37000 CPLD Family

Typical 5.0V Power Consumption (continued)

CY37512

 

6 0 0

 

 

 

 

 

 

 

 

 

5 0 0

 

 

 

 

 

 

 

H igh S p ee d

 

 

 

 

 

 

 

 

 

 

4 0 0

 

 

 

 

 

 

 

 

(mA)

3 0 0

 

 

 

Lo w P ow er

 

 

 

 

Icc

 

 

 

 

 

 

 

 

 

 

2 0 0

 

 

 

 

 

 

 

 

 

1 0 0

 

 

 

 

 

 

 

 

 

0

 

 

 

 

 

 

 

 

 

0

2 0

4 0

6 0

8 0

1 0 0

1 2 0

1 4 0

1 6 0

Frequency (M H z)

The typical pattern is a 16-bit up counter, per logic block, with outputs disabled.

VCC = 5.0V, TA = Room Temperature

Typical 3.3V Power Consumption

CY37032V

 

30

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

High Speed

 

25

 

 

 

 

 

 

 

 

 

 

 

 

 

Low Power

 

 

 

 

 

20

 

 

 

 

 

 

 

 

(mA)

15

 

 

 

 

 

 

 

 

Icc

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

10

 

 

 

 

 

 

 

 

 

5

 

 

 

 

 

 

 

 

 

0

 

 

 

 

 

 

 

 

 

0

20

40

60

80

100

120

140

160

Frequency (MHz)

The typical pattern is a 16-bit up counter, per logic block, with outputs disabled.

VCC = 3.3V, TA = Room Temperature

Document #: 38-03007 Rev. *E

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Cypress 37000 CPLD manual Typical 5.0V Power Consumption CY37512, Typical 3.3V Power Consumption CY37032V