Cypress 37000 CPLD manual Typical 3.3V Power Consumption CY37064V, CY37128V

Ultra37000 CPLD Family

Typical 3.3V Power Consumption (continued)

CY37064V

	4 5
								H igh Speed
	4 0
	3 5
	3 0				Low Power
Icc (mA)	2 5
	2 0
	1 5
	1 0
	5
	0
	0	2 0	4 0	6 0	8 0	100	120	1 4 0

Frequency (M Hz)

The typical pattern is a 16-bit up counter, per logic block, with outputs disabled.

VCC = 3.3V, TA = Room Temperature

CY37128V

	8 0
								H ig h S p e e d
	7 0
	6 0
	5 0				L o w P o w e r
(mA)	4 0
Icc
	3 0
	2 0
	1 0
	0
	0	2 0	4 0	6 0	8 0	1 0 0	1 2 0	1 4 0
				F re q u e n c y (M H z)

The typical pattern is a 16-bit up counter, per logic block, with outputs disabled.

VCC = 3.3V, TA = Room Temperature

Document #: 38-03007 Rev. *E Page 28 of 64

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