Cypress 37000 CPLD manual Typical 5.0V Power Consumption CY37256, CY37384

Ultra37000 CPLD Family

Typical 5.0V Power Consumption (continued)

CY37256

	3 0 0
									H igh S pe ed
	2 5 0
	2 0 0
(mA)						Lo w P ow er
	1 5 0
Icc
	1 0 0
	5 0
	0
	0	2 0	4 0	6 0	8 0	1 0 0	1 2 0	1 4 0	1 6 0	1 8 0

Frequency (M H z)

The typical pattern is a 16-bit up counter, per logic block, with outputs disabled.

VCC = 5.0V, TA = Room Temperature

CY37384

	5 0 0
	4 5 0								H igh Speed
	4 0 0
	3 5 0
	3 0 0
(mA)	2 5 0				Low Power
Icc
	2 0 0
	1 5 0
	1 0 0
	5 0
	0
	0	2 0	4 0	6 0	8 0	100	12 0	1 4 0	16 0

Frequency (M Hz)

The typical pattern is a 16-bit up counter, per logic block, with outputs disabled.

VCC = 5.0V, TA = Room Temperature

Document #: 38-03007 Rev. *E Page 26 of 64

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