Cypress 37000 CPLD Registered Input, Clock to Clock, Latched Input

Ultra37000 CPLD Family
Document #: 38-03007 Rev. *E Page 22 of 64
Registered Input
Clock to Clock
Latched Input
Switching Waveforms (continued)
tIS
REGISTERED
INPUT
INPUT REGISTER
CLOCK
tICO
COMBINATORIAL
OUTPUT
tIH
CLOCK
tWL
tWH
INPUT REGISTER
CLOCK
OUTPUT
REGISTER CLOCK
tSCS tICS
tIS
LATCHED INPUT
LATCH ENABLE
tICO
COMBINATORIAL
OUTPUT
tIH
tPDL
tWL tWH
LATCH ENABLE
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