Cypress 37000 CPLD manual Registered Input, Clock to Clock, Latched Input

Ultra37000 CPLD Family

Switching Waveforms (continued)

Registered Input

REGISTERED

INPUT

INPUT REGISTER

CLOCK

tIS tIH

tICO

COMBINATORIAL OUTPUT

CLOCK

tWH

tWL

Clock to Clock

INPUT REGISTER

CLOCK

tICS

OUTPUT

REGISTER CLOCK

Latched Input

tSCS

LATCHED INPUT

LATCH ENABLE

tIS	tIH
tPDL

tICO

COMBINATORIAL OUTPUT

LATCH ENABLE

tWH

tWL

Document #: 38-03007 Rev. *E Page 22 of 64

[+] Feedback