Cypress 37000 CPLD manual CY37384/CY37384V, Tms

Ultra37000 CPLD Family

Logic Block Diagrams (continued)

CY37384/CY37384V

12 I/Os

I/O0−I/O11

12 I/Os

I/O12−I/O23

12 I/Os

I/O24−I/O35

12 I/Os

I/O36−I/O47

12 I/Os

I/O48−I/O59

12 I/Os

I/O60−I/O71

12 I/Os

I/O72−I/O83

12 I/Os

I/O84−I/O95

TDI	JTAG Tap
TCK		TDO
	Controller
TMS

		Clock/
		Input	Input
		1	4
4	36		36	4
LOGIC				LOGIC
	16		16
BLOCK				BLOCK
AA	36		36	BL
LOGIC				LOGIC	12 I/Os
BLOCK	16		16	BLOCK	I/O168−I/O191
AB	36		36	BK
LOGIC				LOGIC	12 I/Os
BLOCK	16		16	BLOCK	I/O156−I/O179
AC	36		36	BJ
LOGIC				LOGIC	12 I/Os
BLOCK	16		16	BLOCK	I/O144−I/O167
AD	36	PIM	36	BI
LOGIC				LOGIC
	16		16
BLOCK				BLOCK
AE	36		36	BH
LOGIC				LOGIC	12 I/Os
BLOCK	16		16	BLOCK	I/O132−I/O155
AF	36		36	BG
LOGIC				LOGIC
	16		16
BLOCK				BLOCK
AG	36		36	BF
LOGIC				LOGIC	12 I/Os
BLOCK	16		16	BLOCK	I/O120−I/O143
AH	36		36	BE
LOGIC				LOGIC	12 I/Os
BLOCK	16		16	BLOCK	I/O108−I/O131
AI	36		36	BD
LOGIC				LOGIC	12 I/Os
BLOCK	16		16	BLOCK	I/O96−I/O119
AJ	36		36	BC
LOGIC				LOGIC
	16		16
BLOCK				BLOCK
AK	36		36	BB
LOGIC				LOGIC	12 I/Os
BLOCK	16		16	BLOCK	I/O96−I/O107
AL				BA
96				96

Document #: 38-03007 Rev. *E Page 12 of 64

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