CY7C1380D, CY7C1382D
CY7C1380F, CY7C1382F
Document #: 38-05543 Rev. *F Page 19 of 34
Maximum Ratings
Exceeding the maximum ratings may impair the useful life of the
device. For user guidelines, not tested.
Storage Temperature .................................–65°C to +150°C
Ambient Temperature with
Power Applied............................................ –55°C to +125°C
Supply Voltage on VDD Relative to GND........–0.3V to +4.6V
Supply Voltage on VDDQ Relative to GND......–0.3V to +VDD
DC Voltage Applied to Outputs
in Tri-State...........................................–0.5V to VDDQ + 0.5V
DC Input Voltage...................................–0.5V to VDD + 0.5V
Current into Outputs (LOW).........................................20 mA
Static Discharge Voltage........................................... >2001V
(per MIL-STD-883, Method 3015)
Latch-up Current..................................................... >200 mA
Operating Range
Range Ambient
Temper atur e VDD VDDQ
Commercial 0°C to +70°C 3.3V –5%/+10% 2.5V – 5%
to VDD
Industrial –40°C to +85°C
Electrical Characteristics Over the Operating Range [17, 18]
Parameter Description Test Conditions Min Max Unit
VDD Power Supply Voltage 3.135 3.6 V
VDDQ I/O Supply Voltage for 3.3V I/O 3.135 VDD V
for 2.5V I/O 2.375 2.625 V
VOH Output HIGH Voltage for 3.3V I/O, IOH = –4.0 mA 2.4 V
for 2.5V I/O, IOH = –1.0 mA 2.0 V
VOL Output LOW Voltage for 3.3V I/O, IOL = 8.0 mA 0.4 V
for 2.5V I/O, IOL = 1.0 mA 0.4 V
VIH Input HIGH Voltage [17] for 3.3V I/O 2.0 VDD + 0.3V V
for 2.5V I/O 1.7 VDD + 0.3V V
VIL Input LOW Voltage [17] for 3.3V I/O –0.3 0.8 V
for 2.5V I/O –0.3 0.7 V
IXInput Leakage Current
except ZZ and MODE
GND VI VDDQ –5 5 μA
Input Current of MODE Input = VSS –30 μA
Input = VDD 5μA
Input Current of ZZ Input = VSS –5 μA
Input = VDD 30 μA
IOZ Output Leakage Current GND VI VDDQ, Output Disabled –5 5 μA
IDD VDD Operating Supply
Current
VDD = Max., IOUT = 0 mA,
f = fMAX = 1/tCYC
4.0-ns cycle, 250 MHz 350 mA
5.0-ns cycle, 200 MHz 300 mA
6.0-ns cycle, 167 MHz 275 mA
ISB1 Automatic CE
Power Down
Current—TTL Inputs
VDD = Max, Device Deselected,
VIN VIH or VIN VIL
f = fMAX = 1/tCYC
4.0-ns cycle, 250 MHz 160 mA
5.0-ns cycle, 200 MHz 150 mA
6.0-ns cycle, 167 MHz 140 mA
ISB2 Automatic CE Power
Down Current-CMOS
Inputs
VDD = Max, Device Deselected,
VIN 0.3V or VIN > VDDQ – 0.3V, f = 0
All speeds 70 mA
ISB3 Automatic CE
Power Down
Current—CMOS Inputs
VDD = Max, Device Deselected, or
VIN 0.3V or VIN > VDDQ – 0.3V
f = fMAX = 1/tCYC
4.0-ns cycle, 250 MHz 135 mA
5.0-ns cycle, 200 MHz 130 mA
6.0-ns cycle, 167 MHz 125 mA
ISB4 Automatic CE
Power Down
Current—TTL Inputs
VDD = Max, Device Deselected,
VIN VIH or VIN VIL, f = 0
All speeds 80 mA
Notes
17.Overshoot: VIH(AC) < VDD +1.5V (pulse width less than tCYC/2), undershoot: VIL(AC) > –2V (pulse width less than tCYC/2).
18.TPower up: Assumes a linear ramp from 0v to VDD(min.) within 200 ms. During this time VIH < VDD and VDDQ < VDD.
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