CY7C68013A, CY7C68014A
CY7C68015A, CY7C68016A
Document #: 38-08032 Rev. *L Page 34 of 62
xxxx I²C Configuration Byte 0DISCON 0 0 0 0 0 400KHZ xxxxxxxx
[14] n/a
Special Function Registers (SFRs)
80 1IOA[13] Port A (bit addressable) D7 D6 D5 D4 D3 D2 D1 D0 xxxxxxxxRW
81 1SP Stack Pointer D7 D6 D5 D4 D3 D2 D1 D0 00000111RW
82 1DPL0 Data Pointer 0 L A7 A6 A5 A4 A3 A2 A1 A0 00000000RW
83 1DPH0 Data Pointer 0 H A15 A14 A13 A12 A11 A10 A9 A8 00000000RW
84 1DPL1[13] Data Pointer 1 L A7 A6 A5 A4 A3 A2 A1 A0 00000000RW
85 1DPH1[13] Data Pointer 1 H A15 A14 A13 A12 A11 A10 A9 A8 00000000RW
86 1DPS[13] Data Pointer 0/1 select 0 0 0 0 0 0 0 SEL 00000000RW
87 1PCON Power Control SMOD0 x 1 1 x x x IDLE 00110000RW
88 1TCON Timer/Counter Control
(bit addressable) TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0 00000000 RW
89 1TMOD Timer/Counter Mode
Control GATE CT M1 M0 GATE CT M1 M0 00000000 RW
8A 1TL0 Timer 0 reload L D7 D6 D5 D4 D3 D2 D1 D0 00000000RW
8B 1TL1 Timer 1 reload L D7 D6 D5 D4 D3 D2 D1 D0 00000000RW
8C 1TH0 Timer 0 reload H D15 D14 D13 D12 D11 D10 D9 D8 00000000 RW
8D 1TH1 Timer 1 reload H D15 D14 D13 D12 D11 D10 D9 D8 00000000 RW
8E 1CKCON[13] Clock Control x x T2M T1M T0M MD2 MD1 MD0 00000001RW
8F 1reserved
90 1IOB[13] Port B (bit addressable) D7 D6 D5 D4 D3 D2 D1 D0 xxxxxxxxRW
91 1EXIF[13] External Interrupt Flag(s) IE5 IE4 I²CINT USBNT 1 0 0 0 00001000RW
92 1MPAGE[13] Upper Addr Byte of MOVX
using @R0 / @R1 A15 A14 A13 A12 A11 A10 A9 A8 00000000RW
93 5reserved
98 1SCON0 Serial Port 0 Control
(bit addressable) SM0_0 SM1_0 SM2_0 REN_0 TB8_0 RB8_0 TI_0 RI_0 00000000RW
99 1SBUF0 Serial Port 0 Data Buffer D7 D6 D5 D4 D3 D2 D1 D0 00000000RW
9A 1AUTOPTRH1[13] Autopointer 1 Address H A15 A14 A13 A12 A11 A10 A9 A8 00000000RW
9B 1AUTOPTRL1[13] Autopointer 1 Address L A7 A6 A5 A4 A3 A2 A1 A0 00000000RW
9C 1reserved
9D 1AUTOPTRH2[13] Autopointer 2 Address H A15 A14 A13 A12 A11 A10 A9 A8 00000000RW
9E 1AUTOPTRL2[13] Autopointer 2 Address L A7 A6 A5 A4 A3 A2 A1 A0 00000000RW
9F 1reserved
A0 1IOC[13] Port C (bit addressable) D7 D6 D5 D4 D3 D2 D1 D0 xxxxxxxx RW
A1 1INT2CLR[13] Interrupt 2 clear x x x x x x x x xxxxxxxx W
A2 1INT4CLR[13] Interrupt 4 clear x x x x x x x x xxxxxxxx W
A3 5reserved
A8 1IE Interrupt Enable
(bit addressable) EA ES1 ET2 ES0 ET1 EX1 ET0 EX0 00000000 RW
A9 1reserved
AA 1EP2468STAT[13] Endpoint 2,4,6,8 status
flags EP8F EP8E EP6F EP6E EP4F EP4E EP2F EP2E 01011010 R
AB 1EP24FIFOFLGS
[13] Endpoint 2,4 slave FIFO
status flags 0EP4PF EP4EF EP4FF 0EP2PF EP2EF EP2FF 00100010R
AC 1EP68FIFOFLGS
[13] Endpoint 6,8 slave FIFO
status flags 0EP8PF EP8EF EP8FF 0EP6PF EP6EF EP6FF 01100110R
AD 2reserved
AF 1AUTOPTRSETUP[13] Autopointer 1&2 setup 0 0 0 0 0 APTR2INC APTR1INC APTREN 00000110 RW
B0 1IOD[13] Port D (bit addressable) D7 D6 D5 D4 D3 D2 D1 D0 xxxxxxxx RW
B1 1IOE[13] Port E
(NOT bit addressable) D7 D6 D5 D4 D3 D2 D1 D0 xxxxxxxx RW
B2 1OEA[13] Port A Output Enable D7 D6 D5 D4 D3 D2 D1 D0 00000000RW
B3 1OEB[13] Port B Output Enable D7 D6 D5 D4 D3 D2 D1 D0 00000000RW
B4 1OEC[13] Port C Output Enable D7 D6 D5 D4 D3 D2 D1 D0 00000000RW
B5 1OED[13] Port D Output Enable D7 D6 D5 D4 D3 D2 D1 D0 00000000RW
B6 1OEE[13] Port E Output Enable D7 D6 D5 D4 D3 D2 D1 D0 00000000RW
B7 1reserved
B8 1IP Interrupt Priority (bit ad-
dressable) 1PS1 PT2 PS0 PT1 PX1 PT0 PX0 10000000RW
B9 1reserved
BA 1EP01STAT[13] Endpoint 0&1 Status 0 0 0 0 0 EP1INBSY EP1OUTBS
YEP0BSY 00000000R
BB 1GPIFTRIG[13, 11] Endpoint 2,4,6,8 GPIF
slave FIFO Trigger DONE 0 0 0 0 RW EP1 EP0 10000xxx brrrrbbb
BC 1reserved
BD 1GPIFSGLDATH[13] GPIF Data H (16-bit mode
only) D15 D14 D13 D12 D11 D10 D9 D8 xxxxxxxx RW
Note
13.SFRs not part of the standard 8051 architecture.14.If no EEPROM is detected by the SIE then the default is 00000000.
Table 12. FX2LP Register Summary (continued)
Hex Size Name Description b7 b6 b5 b4 b3 b2 b1 b0 Default Access
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