CY7C68013A, CY7C68014A
CY7C68015A, CY7C68016A
Document #: 38-08032 Rev. *L Page 45 of 62
10.9 Slave FIFO Synchronous Write
Figure 20. Slave FIFO Synchronous Write Timing Diagram[20]
Z
Z
tSFD tFDH
DATA
IFCLK
SLWR
FLAGS
tWRH
tXFLG
tIFCLK
tSWR
N
Table 23. Slave FIFO Synchronous Write Parameters with Internally Sourced IFCLK[21]
Parameter Description Min Max Unit
tIFCLK IFCLK Period 20.83 ns
tSWR SLWR to Clock Setup Time 10.4 ns
tWRH Clock to SLWR Hold Time 0 ns
tSFD FIFO Data to Clock Setup Time 9.2 ns
tFDH Clock to FIFO Data Hold Time 0 ns
tXFLG Clock to FLAGS Output Propagation Time 9.5 ns
Table 24. Slave FIFO Synchronous Write Parameters with Externally Sourced IFCLK[21]
Parameter Description Min Max Unit
tIFCLK IFCLK Period 20.83 200 ns
tSWR SLWR to Clock Setup Time 12.1 ns
tWRH Clock to SLWR Hold Time 3.6 ns
tSFD FIFO Data to Clock Setup Time 3.2 ns
tFDH Clock to FIFO Data Hold Time 4.5 ns
tXFLG Clock to FLAGS Output Propagation Time 13.5 ns
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