CY7C68013A, CY7C68014A CY7C68015A, CY7C68016A

3.12 Endpoint RAM

3.12.1 Size

 

3× 64 bytes

(Endpoints 0 and 1)

8 × 512 bytes

(Endpoints 2, 4, 6, 8)

3.12.2Organization

EP0

Bidirectional endpoint zero, 64 byte buffer EP1IN, EP1OUT

64 byte buffers, bulk or interrupt EP2, 4, 6, 8

Eight 512 byte buffers, bulk, interrupt, or isochronous. EP4 and EP8 can be double buffered; EP2 and 6 can be either double, triple, or quad buffered. For high-speed endpoint configuration options, see Figure 5.

3.12.3 Setup Data Buffer

A separate 8 byte buffer at 0xE6B8-0xE6BF holds the setup data from a CONTROL transfer.

3.12.4 Endpoint Configurations (High -speed Mode)

Endpoints 0 and 1 are the same for every configuration. Endpoint 0 is the only CONTROL endpoint, and endpoint 1 can be either BULK or INTERRUPT.

The endpoint buffers can be configured in any 1 of the 12 config- urations shown in the vertical columns. When operating in the full-speed BULK mode only the first 64 bytes of each buffer are used. For example, in high-speed, the max packet size is 512 bytes but in full-speed it is 64 bytes. Even though a buffer is configured to a 512 byte buffer, in full-speed only the first 64 bytes are used. The unused endpoint buffer space is not available for other operations. An example endpoint configu- ration is the EP2–1024 double buffered; EP6–512 quad buffered (column 8).

 

 

 

 

Figure 5. Endpoint Configuration

 

 

 

 

 

EP0 IN&OUT

64

64

64

64

64

64

64

64

64

64

64

64

EP1 IN

64

64

64

64

64

64

64

64

64

64

64

64

EP1 OUT

64

64

64

64

64

64

64

64

64

64

64

64

 

EP2

EP2

EP2

EP2

EP2

EP2

EP2

EP2

EP2

EP2

EP2

EP2

 

512

512

512

512

512

512

1024

1024

1024

512

 

 

 

 

 

 

 

512

512

512

512

512

512

512

1024

 

 

 

 

 

1024

 

 

 

 

 

 

EP4

EP4

EP4

 

 

 

 

 

 

512

 

 

 

 

 

 

 

 

 

 

 

 

 

512

512

512

512

512

512

1024

1024

1024

EP6

1024

1024

 

512

512

512

512

512

512

 

 

 

512

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

EP6

EP6

EP6

EP6

EP6

EP6

EP6

EP6

EP6

512

1024

 

 

512

512

 

512

512

 

512

512

 

 

1024

 

1024

1024

1024

512

1024

 

512

512

512

512

512

512

 

 

 

 

 

 

EP8

EP8

 

 

EP8

 

 

EP8

 

 

EP8

 

 

1024

 

512

512

1024

512

512

1024

512

512

1024

512

512

 

512

512

 

 

512

512

 

512

512

 

512

512

 

 

 

 

 

 

 

 

 

 

1

2

3

4

5

6

7

8

9

10

11

12

Document #: 38-08032 Rev. *L

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Cypress CY7C68013A manual Endpoint RAM, Size × 64 bytes Endpoints 0 × 512 bytes, Organization, Setup Data Buffer

CY7C68013A specifications

The Cypress CY7C68013A is a high-performance USB microcontroller that belongs to Cypress's FX2LP family, specifically designed for USB applications. This microcontroller is well-regarded for its versatility, making it a popular choice for developers engaged in USB-enabled projects.

One of the main features of the CY7C68013A is its ability to support USB 2.0, with both high-speed (480 Mbps) and full-speed (12 Mbps) operation. This capability allows developers to take full advantage of the USB interface for data transfer, making it suitable for applications that require fast and efficient data communication. The device integrates a USB controller along with an 8051-compatible microcontroller, providing a seamless interface for USB transactions while also allowing for custom processing tasks.

The CY7C68013A offers 32 KB of internal RAM, which is a valuable resource for data buffering and temporary storage during data transfer operations. Additionally, it includes a programmable 8-bit I/O interface, which can be tailored to various application needs, facilitating control over peripheral devices. The microcontroller also features a 16-bit address bus and a 16-bit data bus, enhancing its ability to interface with external memory and components.

In terms of development, moving from concept to production becomes easier due to the availability of development kits and software support. The CY7C68013A is compatible with Cypress's EZ-USB development environment, which includes APIs and libraries that simplify the coding process. This software support empowers developers to create sophisticated USB-related applications without needing extensive background knowledge in USB protocol intricacies.

Regarding power efficiency, the CY7C68013A operates at low power consumption levels, making it suitable for battery-operated devices. It supports various low-power modes, which further enhances its appeal for portable applications.

Overall, the Cypress CY7C68013A stands out for its robust features, flexibility, and ease of use, making it an ideal choice for engineers working on USB-centric designs. Its combination of high-speed USB functionality, ample internal resources, and strong software support positions it as a go-to microcontroller for a wide variety of applications, ranging from consumer electronics to industrial systems.