Cypress CY7C68053 I2C Bus, Buses, USB Boot Methods, Bus-powered Applications, Interrupt System

CY7C68053

Table 3-1. Special Function Registers

x	8x	9x	Ax	Bx	Cx	Dx	Ex	Fx
0	IOA	IOB	IOC	IOD	SCON1	PSW	ACC	B
1	SP	EXIF	INT2CLR	IOE	SBUF1
2	DPL0	MPAGE		OEA
3	DPH0			OEB
4	DPL1			OEC
5	DPH1			OED
6	DPS			OEE
7	PCON
8	TCON	SCON0	IE	IP	T2CON	EICON	EIE	EIP
9	TMOD	SBUF0
A	TL0	AUTOPTRH1	EP2468STAT	EP01STAT	RCAP2L
B	TL1	AUTOPTRL1	EP24FIFOFLGS	GPIFTRIG	RCAP2H
C	TH0	Reserved	EP68FIFOFLGS		TL2
D	TH1	AUTOPTRH2		GPIFSGLDATH	TH2
E	CKCON	AUTOPTRL2		GPIFSGLDATLX
F		Reserved	AUTOPTRSET-UP	GPIFSGLDATLNOX

3.3I2C™ Bus

FX2LP18 supports the I2C bus as a master only at 100-/400- KHz. SCL and SDA pins have open-drain outputs and hysteresis inputs. These signals must be pulled up to either VCC or VCC_IO, even if no I2C device is connected.(Connecting to VCC_IO may be more convenient.)

3.4Buses

This 56-pin package has an 8- or 16-bit ‘FIFO’ bidirectional data bus, multiplexed on IO ports B and D.

plugged in, with no hint that the initial download step has occurred.

Two control bits in the USBCS (USB Control and Status) register control the ReNumeration process: DISCON and RENUM. To simulate a USB disconnect, the firmware sets DISCON to 1. To reconnect, the firmware clears DISCON to 0.

Before reconnecting, the firmware sets or clears the RENUM bit to indicate whether the firmware or the Default USB Device handles device requests over endpoint zero: if RENUM = 0, the Default USB Device handles device requests; if RENUM = 1, the firmware does.

3.5USB Boot Methods

During the power-up sequence, internal logic checks the I2C port for the connection of an EEPROM whose first byte is 0xC2. If found, it boot-loads the EEPROM contents into internal RAM (0xC2 load). If no EEPROM is present, an external processor must emulate an I2C slave. The FX2LP18 does not enumerate using internally stored descriptors (for example, Cypress’ VID/PID/DID is not used for enumer- ation).[1]

3.7Bus-powered Applications

The FX2LP18 fully supports bus-powered designs by enumer- ating with less than 100 mA as required by the USB 2.0 speci- fication.

3.8Interrupt System

The FX2LP18 interrupts are described in this section.

3.8.1INT2 Interrupt Request and Enable Registers

3.6ReNumeration™

Because the FX2LP18’s configuration is soft, one chip can take on the identities of multiple distinct USB devices.

When first plugged into USB, the FX2LP18 enumerates automatically and downloads firmware and USB descriptor tables over the USB cable. Next, the FX2LP18 enumerates again, this time as a device defined by the downloaded infor- mation. This patented two-step process, called ReNumeration, happens instantly when the device is

Note

FX2LP18 implements an autovector feature for INT2. There are 27 INT2 (USB) vectors. See the MoBL-USB™ Technical Reference Manual (TRM) for more details.

3.8.2USB Interrupt Autovectors

The main USB interrupt is shared by 27 interrupt sources. To save the code and processing time that is normally required to identify the individual USB interrupt source, the FX2LP18 provides a second level of interrupt vectoring, called ‘Autovec- toring.’ When a USB interrupt is asserted, the FX2LP18

1.The I2C bus SCL and SDA pins must be pulled up, even if an EEPROM is not connected. Otherwise this detection method does not work properly.

Document # 001-06120 Rev *F Page 3 of 39

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