CY7C68053

Table 5-1. FX2LP18 Register Summary (continued)

Hex

Size

Name

Description

b7

b6

b5

b4

b3

b2

b1

b0

Default

Access

E6A1

1

EP1OUTCS

Endpoint 1 OUT Control

0

0

0

0

0

0

BUSY

STALL

00000000

bbbbbbrb

 

 

 

and Status

 

 

 

 

 

 

 

 

 

 

E6A2

1

EP1INCS

Endpoint 1 IN Control and

0

0

0

0

0

0

BUSY

STALL

00000000

bbbbbbrb

 

 

 

Status

 

 

 

 

 

 

 

 

 

 

E6A3

1

EP2CS

Endpoint 2 Control and

0

NPAK2

NPAK1

NPAK0

FULL

EMPTY

0

STALL

00101000

rrrrrrrb

 

 

 

Status

 

 

 

 

 

 

 

 

 

 

E6A4

1

EP4CS

Endpoint 4 Control and

0

0

NPAK1

NPAK0

FULL

EMPTY

0

STALL

00101000

rrrrrrrb

 

 

 

Status

 

 

 

 

 

 

 

 

 

 

E6A5

1

EP6CS

Endpoint 6 Control and

0

NPAK2

NPAK1

NPAK0

FULL

EMPTY

0

STALL

00000100

rrrrrrrb

 

 

 

Status

 

 

 

 

 

 

 

 

 

 

E6A6

1

EP8CS

Endpoint 8 Control and

0

0

NPAK1

NPAK0

FULL

EMPTY

0

STALL

00000100

rrrrrrrb

 

 

 

Status

 

 

 

 

 

 

 

 

 

 

E6A7

1

EP2FIFOFLGS

Endpoint 2 slave FIFO

0

0

0

0

0

PF

EF

FF

00000010

R

 

 

 

Flags

 

 

 

 

 

 

 

 

 

 

E6A8

1

EP4FIFOFLGS

Endpoint 4 slave FIFO

0

0

0

0

0

PF

EF

FF

00000010

R

 

 

 

Flags

 

 

 

 

 

 

 

 

 

 

E6A9

1

EP6FIFOFLGS

Endpoint 6 slave FIFO

0

0

0

0

0

PF

EF

FF

00000110

R

 

 

 

Flags

 

 

 

 

 

 

 

 

 

 

E6AA

1

EP8FIFOFLGS

Endpoint 8 slave FIFO

0

0

0

0

0

PF

EF

FF

00000110

R

 

 

 

Flags

 

 

 

 

 

 

 

 

 

 

E6AB

1

EP2FIFOBCH

Endpoint 2 slave FIFO

0

0

0

BC12

BC11

BC10

BC9

BC8

00000000

R

 

 

 

total byte count H

 

 

 

 

 

 

 

 

 

 

E6AC

1

EP2FIFOBCL

Endpoint 2 slave FIFO

BC7

BC6

BC5

BC4

BC3

BC2

BC1

BC0

00000000

R

 

 

 

total byte count L

 

 

 

 

 

 

 

 

 

 

E6AD

1

EP4FIFOBCH

Endpoint 4 slave FIFO

0

0

0

0

0

BC10

BC9

BC8

00000000

R

 

 

 

total byte count H

 

 

 

 

 

 

 

 

 

 

E6AE

1

EP4FIFOBCL

Endpoint 4 slave FIFO

BC7

BC6

BC5

BC4

BC3

BC2

BC1

BC0

00000000

R

 

 

 

total byte count L

 

 

 

 

 

 

 

 

 

 

E6AF

1

EP6FIFOBCH

Endpoint 6 slave FIFO

0

0

0

0

BC11

BC10

BC9

BC8

00000000

R

 

 

 

total byte count H

 

 

 

 

 

 

 

 

 

 

E6B0

1

EP6FIFOBCL

Endpoint 6 slave FIFO

BC7

BC6

BC5

BC4

BC3

BC2

BC1

BC0

00000000

R

 

 

 

total byte count L

 

 

 

 

 

 

 

 

 

 

E6B1

1

EP8FIFOBCH

Endpoint 8 slave FIFO

0

0

0

0

0

BC10

BC9

BC8

00000000

R

 

 

 

total byte count H

 

 

 

 

 

 

 

 

 

 

E6B2

1

EP8FIFOBCL

Endpoint 8 slave FIFO

BC7

BC6

BC5

BC4

BC3

BC2

BC1

BC0

00000000

R

 

 

 

total byte count L

 

 

 

 

 

 

 

 

 

 

E6B3

1

SUDPTRH

Set-up Data Pointer high

A15

A14

A13

A12

A11

A10

A9

A8

xxxxxxxx

RW

 

 

 

address byte

 

 

 

 

 

 

 

 

 

 

E6B4

1

SUDPTRL

Set-up Data Pointer low

A7

A6

A5

A4

A3

A2

A1

0

xxxxxxx0

bbbbbbbr

 

 

 

address byte

 

 

 

 

 

 

 

 

 

 

E6B5

1

SUDPTRCTL

Set-up Data Pointer Auto

0

0

0

0

0

0

0

SDPAUTO

00000001

RW

 

 

 

Mode

 

 

 

 

 

 

 

 

 

 

 

2

Reserved

 

 

 

 

 

 

 

 

 

 

 

E6B8

8

SET-UPDAT

8 bytes of set-up data

D7

D6

D5

D4

D3

D2

D1

D0

xxxxxxxx

R

 

 

 

SET-UPDAT[0] =

 

 

 

 

 

 

 

 

 

 

 

 

 

bmRequestType

 

 

 

 

 

 

 

 

 

 

 

 

 

SET-UPDAT[1] =

 

 

 

 

 

 

 

 

 

 

 

 

 

bmRequest

 

 

 

 

 

 

 

 

 

 

 

 

 

SET-UPDAT[2:3] = wVal-

 

 

 

 

 

 

 

 

 

 

 

 

 

ue

 

 

 

 

 

 

 

 

 

 

 

 

 

SET-UPDAT[4:5] = wInd-

 

 

 

 

 

 

 

 

 

 

 

 

 

ex

 

 

 

 

 

 

 

 

 

 

 

 

 

SET-UPDAT[6:7] =

 

 

 

 

 

 

 

 

 

 

 

 

 

wLength

 

 

 

 

 

 

 

 

 

 

 

 

GPIF

 

 

 

 

 

 

 

 

 

 

 

E6C0

1

GPIFWFSELECT

Waveform Selector

SINGLEWR1

SINGLEWR0

SINGLERD1

SINGLERD0

FIFOWR1

FIFOWR0

FIFORD1

FIFORD0

11100100

RW

E6C1

1

GPIFIDLECS

GPIF Done, GPIF IDLE

DONE

0

0

0

0

0

0

IDLEDRV

10000000

RW

 

 

 

drive mode

 

 

 

 

 

 

 

 

 

 

E6C2

1

GPIFIDLECTL

Inactive Bus, CTL states

0

0

0

0

0

CTL2

CTL1

CTL0

11111111

RW

E6C3

1

GPIFCTLCFG

CTL Drive Type

TRICTL

0

0

0

0

CTL2

CTL1

CTL0

00000000

RW

E6C4

1

Reserved

 

 

 

 

 

 

 

 

 

00000000

 

E6C5

1

Reserved

 

 

 

 

 

 

 

 

 

00000000

 

 

 

FLOWSTATE

 

 

 

 

 

 

 

 

 

 

 

E6C6

1

FLOWSTATE

Flowstate Enable and

FSE

0

0

0

0

FS2

FS1

FS0

00000000

brrrrbbb

 

 

 

Selector

 

 

 

 

 

 

 

 

 

 

E6C7

1

FLOWLOGIC

Flowstate Logic

LFUNC1

LFUNC0

TERMA2

TERMA1

TERMA0

TERMB2

TERMB1

TERMB0

00000000

RW

E6C8

1

FLOWEQ0CTL

CTL-Pin States in

CTL0E3

CTL0E2

CTL0E1

CTL0E0

0

CTL2

CTL1

CTL0

00000000

RW

 

 

 

Flowstate

 

 

 

 

 

 

 

 

 

 

 

 

 

(when Logic = 0)

 

 

 

 

 

 

 

 

 

 

E6C9

1

FLOWEQ1CTL

CTL-Pin States in Flow-

CTL0E3

CTL0E2

CTL0E1

CTL0E0

0

CTL2

CTL1

CTL0

00000000

RW

 

 

 

state (when Logic = 1)

 

 

 

 

 

 

 

 

 

 

E6CA

1

FLOWHOLDOFF

Holdoff Configuration

HOPERIOD3

HOPERIOD2

HOPERIOD1

HOPERIOD

HOSTATE

HOCTL2

HOCTL1

HOCTL0

00010010

RW

 

 

 

 

 

 

 

0

 

 

 

 

 

 

E6CB

1

FLOWSTB

Flowstate Strobe

SLAVE

RDYASYNC

CTLTOGL

SUSTAIN

0

MSTB2

MSTB1

MSTB0

00100000

RW

 

 

 

Configuration

 

 

 

 

 

 

 

 

 

 

E6CC

1

FLOWSTBEDGE

Flowstate Rising/Falling

0

0

0

0

0

0

FALLING

RISING

00000001

rrrrrrbb

 

 

 

Edge Configuration

 

 

 

 

 

 

 

 

 

 

E6CD

1

FLOWSTBPERIOD

Master-Strobe Half-Period

D7

D6

D5

D4

D3

D2

D1

D0

00000010

RW

E6CE

1

GPIFTCB3[10]

GPIF Transaction Count

TC31

TC30

TC29

TC28

TC27

TC26

TC25

TC24

00000000

RW

 

 

 

Byte 3

 

 

 

 

 

 

 

 

 

 

Document # 001-06120 Rev *F

Page 19 of 39

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Page 19
Image 19
Cypress CY7C68053 EP1OUTCS, Busy Stall, EP1INCS, EP2CS, NPAK2 NPAK1 NPAK0 Full Empty Stall, EP4CS, EP6CS, EP8CS, Sudptrh

CY7C68053 specifications

The Cypress CY7C68053 is a versatile USB microcontroller known for its strong performance and rich feature set, catering to a wide range of applications requiring USB connectivity. Part of the Cypress family of USB products, this microcontroller combines the convenience of USB interfacing with powerful embedded processing capabilities.

At its core, the CY7C68053 is built on an 8051 microcontroller architecture, enabling efficient data handling and control operations. It operates at speeds of up to 48 MHz, providing ample processing power for complex applications. The device features an integrated USB 2.0 full-speed controller, which allows for high-speed data transfer rates of up to 12 Mbps. This makes it ideal for applications such as data transfer, communication devices, and real-time processing tasks.

One of the standout features of the CY7C68053 is its flexible pin configuration. It supports a variety of operating modes, including peripheral mode, host mode, and a combination of both, allowing it to cater to diverse application requirements. Additionally, the device offers a large number of GPIO pins that can be used for various control and communication tasks. This flexibility ensures that developers can tailor the hardware to meet the specific needs of their application.

In terms of development, the CY7C68053 is backed by a robust set of software development tools from Cypress. The EZ-USB development kit provides a comprehensive platform for firmware development, testing, and debugging. This kit includes libraries, example projects, and a user-friendly integrated development environment (IDE), streamlining the development process for engineers.

The CY7C68053 is also equipped with an extensive memory system, featuring 32 kB of in-system programmable Flash memory, 2 kB of SRAM, and 128 bytes of EEPROM. This memory capacity allows for the storage of complex firmware and user data, enhancing the device's versatility.

Moreover, the CY7C68053 is designed with low power consumption in mind. It includes power management features that allow it to operate efficiently, making it suitable for battery-operated devices.

In summary, the Cypress CY7C68053 stands out as a powerful USB microcontroller that combines high-speed processing, flexible configurations, and robust software support. Its features make it an excellent choice for developers looking to create innovative USB-enabled products across various applications.