Cypress CY7C68053 manual FIFOADR0, FIFOADR1, Pktend, Slcs#, Port B

CY7C68053

Table 4-1. FX2LP18 Pin Descriptions (continued)[9]

56 VFBGA	Name	Type	Default	Description
6F	PA4 or	I/O/Z	I	Multiplexed pin whose function is selected by:
	FIFOADR0		(PA4)	IFCONFIG[1:0].
				PA4 is a bidirectional IO port pin.
				FIFOADR0 is an input-only address select for the slave FIFO’s connected
				to FD[7:0] or FD[15:0].
8C	PA5 or	I/O/Z	I	Multiplexed pin whose function is selected by:
	FIFOADR1		(PA5)	IFCONFIG[1:0].
				PA5 is a bidirectional IO port pin.
				FIFOADR1 is an input-only address select for the slave FIFO’s connected
				to FD[7:0] or FD[15:0].
7C	PA6 or	I/O/Z	I	Multiplexed pin whose function is selected by the IFCONFIG[1:0] bits.
	PKTEND		(PA6)	PA6 is a bidirectional IO port pin.
				PKTEND is an input used to commit the FIFO packet data to the endpoint
				and whose polarity is programmable using FIFOPINPOLAR.5.
6C	PA7 or	I/O/Z	I	Multiplexed pin whose function is selected by the IFCONFIG[1:0] and
	FLAGD or		(PA7)	PORTACFG.7 bits.
	SLCS#			PA7 is a bidirectional IO port pin.
				FLAGD is a programmable slave FIFO output status flag signal.
				SLCS# gates all other slave FIFO enable/strobes
Port B
3H	PB0 or	I/O/Z	I	Multiplexed pin whose function is selected by the following bits:
	FD[0]		(PB0)	IFCONFIG[1:0].
				PB0 is a bidirectional IO port pin.
				FD[0] is the bidirectional FIFO/GPIF data bus.
4F	PB1 or	I/O/Z	I	Multiplexed pin whose function is selected by the following bits:
	FD[1]		(PB1)	IFCONFIG[1:0].
				PB1 is a bidirectional IO port pin.
				FD[1] is the bidirectional FIFO/GPIF data bus.
4H	PB2 or	I/O/Z	I	Multiplexed pin whose function is selected by the following bits:
	FD[2]		(PB2)	IFCONFIG[1:0].
				PB2 is a bidirectional IO port pin.
				FD[2] is the bidirectional FIFO/GPIF data bus.
4G	PB3 or	I/O/Z	I	Multiplexed pin whose function is selected by the following bits:
	FD[3]		(PB3)	IFCONFIG[1:0].
				PB3 is a bidirectional IO port pin.
				FD[3] is the bidirectional FIFO/GPIF data bus.
5H	PB4 or	I/O/Z	I	Multiplexed pin whose function is selected by the following bits:
	FD[4]		(PB4)	IFCONFIG[1:0].
				PB4 is a bidirectional IO port pin.
				FD[4] is the bidirectional FIFO/GPIF data bus.
5G	PB5 or	I/O/Z	I	Multiplexed pin whose function is selected by the following bits:
	FD[5]		(PB5)	IFCONFIG[1:0].
				PB5 is a bidirectional IO port pin.
				FD[5] is the bidirectional FIFO/GPIF data bus.
5F	PB6 or	I/O/Z	I	Multiplexed pin whose function is selected by the following bits:
	FD[6]		(PB6)	IFCONFIG[1:0].
				PB6 is a bidirectional IO port pin.
				FD[6] is the bidirectional FIFO/GPIF data bus.
6H	PB7 or	I/O/Z	I	Multiplexed pin whose function is selected by the following bits:
	FD[7]		(PB7)	IFCONFIG[1:0].
				PB7 is a bidirectional IO port pin.
				FD[7] is the bidirectional FIFO/GPIF data bus.

Document # 001-06120 Rev *F Page 13 of 39

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