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Cypress Switching Waveforms for the CYV15G0404RB HOTLink II Receiver, ADDR30, DATA70, Wren

Models: CYV15G0404RB

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CYV15G0404RB

Switching Waveforms for the CYV15G0404RB HOTLink II Receiver

Receive Interface

Read Timing

RXRATEx = 0

RXCLKx+

RXCLKx–

RXDx[9:0]

Receive Interface

Read Timing

RXRATEx = 1

RXCLKx+

RXCLKx–

RXDx[9:0]

tRXCLKP

tRXDV–

tRXDV+

tRXCLKP

tRXDV–

tRXDV+

CYV15G0404RB HOTLink II Bus Configuration Switching Waveforms

Bus Configuration
Write Timing
ADDR[3:0]
DATA[7:0]
WREN	tDATAS

tWRENP

tDATAH

Document #: 38-02102 Rev. *C

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Cypress manual Switching Waveforms for the CYV15G0404RB HOTLink II Receiver, ADDR30, DATA70, Wren, + Feedback

Contents

Independent Clock Quad HOTLink II Deserializing Reclocker FeaturesCYV15G0404RB Functional DescriptionReclocker RX CYV15G0404RB Deserializing Reclocker Logic Block DiagramCYV15G0404RB Reclocker RXBoundary Reclocking Deserializer Path Block DiagramCYV15G0404RB JTAGCYV15G0404RB Reclocking Deserializer Path Block Diagram continued+ Feedback Device Configuration and Control Block Diagram= Internal Signal CYV15G0404RBPage 6 of Pin Configuration Top View1CYV15G0404RB Document # 38-02102 Rev. *C Pin Configuration Bottom View1CYV15G0404RB Receive Path Data and Status Signals Pin Definitions CYV15G0404RB Quad HOTLink II Deserializing ReclockerIO Characteristics Signal DescriptionCYV15G0404RB Pin Definitions continuedCYV15G0404RB Quad HOTLink II Deserializing Reclocker Page 10 of CYV15G0404RBPin Definitions continued CYV15G0404RB Quad HOTLink II Deserializing ReclockerTransition Density CYV15G0404RB HOTLink II OperationCYV15G0404RB Receive Data Path Analog AmplitudeCYV15G0404RB Receive Channel EnabledReclocker Output Channels Enabled Table 2. Operating Speed SettingsDevice Reset State Power ControlDevice Configuration and Control Interface BIST Status State MachinePage 14 of CYV15G0404RBPage 15 of CYV15G0404RBADDR ResetCYV15G0404RB + FeedbackTable 5. Receive BIST Status Bits JTAG SupportReceive BIST = Enabled CYV15G0404RBFigure 2. Receive BIST State Machine CYV15G0404RBCYV15G0404RB CYV15G0404RB DC Electrical CharacteristicsMaximum Ratings Operating RangeCYV15G0404RB CYV15G0404RB DC Electrical Characteristics continuedAC Test Loads and Waveforms CYV15G0404RB CYV15G0404RB AC Electrical CharacteristicsCYV15G0404RB CYV15G0404RB AC Electrical Characteristics continuedPLL Characteristics Capacitance14ADDR30 Switching Waveforms for the CYV15G0404RB HOTLink II ReceiverCYV15G0404RB HOTLink II Bus Configuration Switching Waveforms CYV15G0404RBCYV15G0404RB CYV15G0404RB TOP VIEW Package DiagramOrdering Information CYV15G0404RBDocument Number Document History PageISSUE CYV15G0404RB

Switching Waveforms for the CYV15G0404RB HOTLink II Receiver

CYV15G0404RB HOTLink II Bus Configuration Switching Waveforms

ADDR[3:0]

DATA[7:0]

WREN