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CHAPTER 3 CLOCK GENERATOR AND CONTROLLER
[Example of setting the maximum gear speed]
Returning from the Sleep State
An interrupt or resetting can be used to return from the sleep state.
Return by way of an interrupt
When the enable bit for the interrupt, which is one of th e p eriph er al fun ct ions, is o n, a pe ri ph eral
interrupt can be used to return from the sleep state.
The procedure for returning from the stop state to the normal run state is as follows:
Interrupt generation --> restart of internal bus clock supply --> restart of internal CPU
clock supply
Program execution after clock supply is as follo ws:
When the level of the caused interrupt is enabled by the I flag of CPU ILM
The progr am saves the register, fetches the interrupt vector, and execut es processing
beginning from the interrupt processing routine.
When the level of the caused interrupt is disabled by the I flag of CPU ILM
The pro gram execute s instruct ions begin ning from th e instruct ion follow ing the instr uction
that caused transition to the sleep state.
Return by way of a reset request
The procedure for returning from the stop state to the normal run state is as follows:
Occurrence of internal reset --> restart of internal bus clock supply --> restart of internal
CPU clock supply --> reset vector fetch --> restart of instruction execution from reset
entry address
<Notes>
When a perip heral interru pt is used as a DMA transfer request, the inter rupt can not be us ed
to return from the sleep state.
If a per ipheral inte rrupt request h as already been issued when the ST CR register bits 7 and
6 are written, transition to the sleep state does not occur. If a DMA request and sleep
LDI:20 #GCR,R0
LDI:8 #0000001 1b,R1 ; CHC=1,CPU=peripheral gear ratio
STB R1,@R0 ; If DBLON=0
LDI:20 #STCR,R0
LDI:8 #0101000 0b,R1 ; SLEP=1
STB R1,@R0
NOP ;
NOP ;
NOP ;
NOP ;
NOP ;
NOP ;