Contents
xii C141-E042-01EN
Figure 5.6 Protocol for the command execution without data transfer 5-73
Figure 5.7 Normal DMA data transfer 5-75
Figure 5.8 Data transfer timing 5-77
Figure 5.9 Single word DMA data transfer timing (mode 2) 5-78
Figure 5.10 Multiword DMA data transfer timing (mode 2) 5-79
Figure 5.11 Power on Reset Timing 5-80
Figure 6.1 Response to power-on 6-3
Figure 6.2 Response to hardware reset 6-4
Figure 6.3 Response to software reset 6-5
Figure 6.4 Response to diagnostic command 6-6
Figure 6.5 Address translation (example in CHS mode) 6-8
Figure 6.6 Address translation (example in LBA mode) 6-9
Figure 6.7 Sector slip processing 6-12
Figure 6.8 Alternate cylinder assignment 6-13
Figure 6.9 Data buffer configuration 6-14
TablesTable 1.1 Specifications 1-4
Table 1.2 Model names and product numbers 1-5
Table 1.3 Current and power dissipation 1-6
Table 1.4 Environmental specifications 1-7
Table 1.5 Acoustic noise specification 1-7
Table 1.6 Shock and vibration specification 1-8
Table 3.1 Surface temperature measurement points and standard values 3-5
Table 3.2 Cable connector specifications 3-8
Table 4.1 Self-calibration execution timechart 4-9
Table 4.2 Write precompensation algorithm 4-10
Table 4.3 Write clock freqeuncy and recording density (BPI) of each zone
4-13
Table 5.1 Signal assignment on the interface connector 5-3
Table 5.2 I/O registers 5-7
Table 5.3 Command code and parameters 5-14
Table 5.4 Information to be read by IDENTIFY DEVICE command 5-32
Table 5.5 Features register values and settable modes 5-38
Table 5.6 Diagnostic code 5-43
Table 5.7 Features Register values (subcommands) and functions 5-54
Table 5.8 Format of device attribute value data 5-56
Table 5.9 Format of insurance failure threshold value data 5-57