At command issuance (I/O registers setting contents)
1F7H(CM) |
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| X'94' or X'E0' |
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1F6H(DH) | × | × | × | DV |
| xx |
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1F5H(CH) |
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| xx |
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1F4H(CL) |
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| xx |
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1F3H(SN) |
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| xx |
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1F2H(SC) |
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| xx |
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1F1H(FR) |
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| xx |
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At command completion (I/O registers contents to be read)
1F7H(ST) |
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| Status information |
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1F6H(DH) | × | × | × |
| DV |
| xx |
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1F5H(CH) |
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| xx |
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1F4H(CL) |
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| xx |
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1F3H(SN) |
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| xx |
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1F2H(SC) |
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| xx |
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1F1H(ER) |
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| Error information |
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(26)SLEEP (X'99' or X'E6')
This command is the only way to make the device enter the sleep mode.
Upon receipt of this command, the device sets the BSY bit of the Status register and enters the sleep mode. The device then clears the BSY bit and generates an interrupt. The device generates an interrupt even if the device has not fully entered the sleep mode.
In the sleep mode, the spindle motor is stopped and the ATA interface section is inactive. All I/O register outputs are in
The only way to release the device from sleep mode is to execute a software or hardware reset.
At command issuance (I/O registers setting contents)
1F7H(CM) |
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| X'99' or X'E6' |
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1F6H(DH) | × | × | × | DV |
| xx |
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1F5H(CH) |
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| xx |
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1F4H(CL) |
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| xx |
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1F3H(SN) |
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| xx |
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1F2H(SC) |
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| xx |
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1F1H(FR) |
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| xx |
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5 - 48 |
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