RCV56HCF PCI/CardBus Modem Designer’s Guide

3.3.4 IOM-2 Interface

The interface timing is listed in Table 3-13 and shown in Figure 3-8.

Table 3-13. Timing - IOM-2 Interface

Symbol

Parameter

Min

Typ.

Max

Units

Test Condition

tr, tf

Data clock (DCL) and frame

30

ns

CL = 25 pF

 

sync (FSC) rise/fall

 

 

 

 

 

tDCL

Data clock period (note 1)

565

651

735

ns

CL = 25 pF

twH, twL

Data clock pulse width high/low

200

310

420

ns

 

 

(note 1)

 

 

 

 

 

tsD

Data setup

32

ns

 

thD

Data hold

32

ns

 

tdF

Frame advance

0

65

130

ns

CL = 25 pF

thF

Frame hold

20

ns

CL = 25 pF

tdDC

Data delay clock

20

100

ns

CL = 150 pF

tdDF

Data delay frame

150

ns

CL = 150 pF

Notes:

 

 

 

 

1. 768 bps.

 

 

 

 

IOM_CLK (DCL)

 

 

 

 

IOM_FRAME (FSC)

 

 

 

 

IOM_DD (DD)

Bit N

Bit 0

Bit 1

Bit 2

IOM_DU (DU)

 

 

 

 

 

 

Detail a

 

 

 

 

t DCL

 

 

 

t r

t f

 

 

IOM_CLK (DCL)

 

 

 

 

 

t wH

t wL

 

 

 

t dF

t hF

 

 

IOM_FRAME (FSC)

 

 

 

 

 

t dDC

 

 

 

 

t dDF

 

 

 

IOM_DU (DU)

 

Bit 0

 

 

 

 

t sD

t hD

 

 

 

 

 

IOM_DD (DD)

 

 

 

 

 

 

Detail a

 

 

 

 

 

 

1123F3-9

 

Figure 3-8. Waveforms - IOM-2 Interface

 

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Hayes Microcomputer Products RCV56HCF manual Timing IOM-2 Interface