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HP E1459A STATus:QUEStionable:CONDition, STATus:QUEStionable:ENABle <mask

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STATus:QUEStionable:CONDition?

Always returns a 0.

Note The Questionable Status Condition, Event, and Enable registers exist for SCPI compliance only. No status bits are defined or reported in these registers.

Parameters None

Comments • No bits are defined.

•*RST clears all Status Questionable Conditions.

•*CLS does not affect the contents of the Status Questionable Conditions.

•The STAT:PRESet command does not affect the Status Questionable Conditions.

STATus:QUEStionable:ENABle <mask>

Sets the value of the QUEStionable Status Enable Register.

Note The Questionable Status Condition, Event, and Enable registers exist for SCPI compliance only. No status bits are defined or reported in these registers.

Parameters None

Comments • No bits are defined.

•*RST and *CLS do not affect the value of the enable mask.

•The STAT:PRESet command sets the value of the enable mask to 0.

66 HP E1459A SCPI Command Reference

Contents

Contents Page Page Page Page Page Page Page BUSINESS REPLY MAIL HEWLETT-PACKARDCOMPANY Page Installing and Configuring the HP E1459A Functional Description Page Page Watchdog Timer Input Level Selection Input Isolation Input Debounce Processing Input Edge Detection Page Input Data Capture Front Panel Markers Interrupt Driven or Polled Mode Operations Interrupt Parsing Configuring for Installation Setting the Logical Address Setting the Interrupt Priority Setting Input Threshold Levels Setting the Reset Time on the Connecting User Inputs Page Installing the HP E1459A in a VXIbus Mainframe Terminal Block Wiring a Terminal Block Page Page Using the HP E1459A Module Power-on /Reset States Example 1: Reset, Self Test and Module ID Page Digital Input Example 2: Digital Input Page Edge Detected Event Detection Page Page Example 3: Edge Interrupt Page HP E1459A SCPI Command Reference Common Command Format SCPI Command Format Command Separator Abbreviated Commands Implied Commands Command Parameters Linking Commands DIAGnostic:SYSReset Subsystem DIAGnostic:SYSReset[:STATe] DIAGnostic:SYSReset:ENABle <state DIAGnostic:SYSReset:ENABle DISPlay:MONitor Subsystem DISPlay:MONitor:PORT <port DISPlay:MONitor:PORT? [MINimum | MAXimum | DEFault] DISPlay:MONitor:PORT:AUTO <state DISPlay:MONitor:PORT:AUTO DISPlay:MONitor[:STATe] <state DISPlay:MONitor[:STATe] INPut Subsystem INPutn:CLOCk[:SOURce] <source INPutn:CLOCk[:SOURce] INPutn:DEBounce:TIME <time> | MINimum | MAXimum | DEFault INPutn:DEBounce:TIME? [MINimum | MAXimum | DEFault] MEASure Subsystem MEASure:DIGital:DATAn[:type] [:VALue] MEASure:DIGital:DATAn[:type]:BITm MEMory Subsystem MEMory:DELete:MACRo <name SENSe Subsystem [SENSe:]EVENt:PORTn:DAVailable [SENSe:]EVENt:PORTn:DAVailable:ENABle <state [SENSe:]EVENt:PORTn:DAVailable:ENABle [SENSe:]EVENt:PORTn:EDGE [SENSe:]EVENt:PORTn:EDGE:ENABle <state [SENSe:]EVENt:PORTn:EDGE:ENABle [SENSe:]EVENt:PORTn:NEDGe [SENSe:]EVENt:PORTn:NEDGe:ENABle <mask [SENSe:]EVENt:PORTn:NEDGe:ENABle [SENSe:]EVENt:PORTn:PEDGe [SENSe:]EVENt:PORTn:PEDGe:ENABle <mask [SENSe:]EVENt:PORTn:PEDGe:ENABle [SENSe:]EVENt:PSUMmary:DAVailable [SENSe:]EVENt:PSUMmary:EDGE STATus Subsystem Page STATus:OPERation:CONDition STATus:OPERation:ENABle <mask STATus:OPERation:ENABle STATus:OPERation[:EVENt] STATus:OPERation:PSUMmary:CONDition STATus:OPERation:PSUMmary:ENABle <mask STATus:OPERation:PSUMmary:ENABle STATus:OPERation:PSUMmary[:EVENt] STATus:PRESet STATus:QUEStionable:CONDition STATus:QUEStionable:ENABle <mask STATus:QUEStionable:ENABle STATus:QUEStionable[:EVENt] SYSTem Subsystem SYSTem:CDEScription? <number SYSTem:CTYPe? <number SYSTem:ERRor SYSTem:VERSion IEEE 488.2 Common Commands Command Quick Reference Page HP E1459A Specifications Page HP E1459A Register Definitions Overview Addressing the Registers Register Access with Logical Address with Memory Register Definitions Status/Control Register Page Edge Interrupt Status Register Data Available Status Register Control/Status Register Command Register Port 0/2 Page Channel Data Register Port 0/2 Positive Edge Detect Register Port Negative Edge Positive Mask Register Port 0/2 Negative Mask Register Port 0/2 Debounce Clock Register Port 0 and Port1/ Port 2 and Port Command Register Port 1/3 Channel Data Register Port 1/3 Positive Mask Register Port 1/3 Negative Mask Register Port 1/3 Port 1/ Port 2 and Page Power On/Reset Conditions Programming Examples Output and Edge Detection Examples Page Page Page Page Page Page Page Page Page Page Page Page Error Messages Page Index