Edge Interrupt Status Register

Bit 14 is the MODID bit. When a "0" is returned in bit 14 then the module has been selected with a high state on the P2 MODID line. If a "1" is returned then the module has not been selected. This bit is read only.

The Edge Interrupt Status Register (base + 06h) indicates if an edge interrupt has been detected for any of the 4 ports. There are 4 bits used in this register, one for each port. A bit will remain asserted ("1") in this register until all edge events for a port have been cleared. Bit 0 is used for Port 0, bit 1 for Port 1, bit 2 for Port 2, and bit 3 for Port 3. These bits reflect the state of the INTR lines available on the terminal module. The INTR lines will be asserted when a bit is "1" in this register. This register has no effect if it is written.

Edge Interrupt Status Register (base + 06h)

b + 6h

15

14

13

12

 

11

10

9

 

8

7

6

 

5

4

3

2

1

0

Write

 

 

 

 

 

 

 

 

 

 

No Effect

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Read

 

 

 

 

Always Returns FFFh

 

 

 

 

 

 

INTR3

INTR2

INTR1

INTR0

Data Available Status Register

INTRX = Edge interrupt for port 0 - 3. A "1" means an edge event has been detected within the corresponding port and a "0" means one hasn't. A bit set to "1" will only return to "0" by reading the interrupt register that caused the edge detection to occur.

The Data Available Status Register (base + 08h) indicates if an external trigger has occurred for any of the 4 ports. There are 4 bits used in this register, one for each port. A bit will be asserted when the DAV ENAB bit and the INT/EXT bit are set ("1") in the command register for a port, and an external trigger occurs. (An external trigger occurs on a negative edge). Bit 0 is used for Port 0, bit 1 for Port 1, bit 2 for Port 2, and bit 3 for Port 3. These bits reflect the state of the DAV lines available on the terminal module. The DAV lines will be asserted when a bit is "1" in this register. This register has no effect if it is written.

Data Available Register (base + 08h)

b + 8h

15

14

13

12

 

11

10

9

 

8

7

6

5

4

3

2

1

0

Write

 

 

 

 

 

 

 

 

 

 

No Effect

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Read

 

 

 

 

Always Returns FFFh

 

 

 

 

 

DAV3

DAV2

DAV1

DAV0

DAVX = Data available in Port 0 - 3. A "1" means that new data has been latched into the channel data register for that port. A "0" means it has not been triggered yet. A bit set to "1" will only return to "0" by reading the DAV register associated with that port.

80 HP E1459A Register Definitions