EM78P447N

8-Bit Microcontroller with OTP ROM

4.5.2 The Status of RST, T, and P of STATUS Register

A RESET condition is initiated by one of the following events:

1.A power-on condition,

2.A high-low-high pulse on /RESET pin, and

3.Watchdog timer time-out.

The values of T and P (listed in Table 8 below) are used to verify the event that triggered the processor to wake up.

Table 8 shows the events that may affect the status of T and P.

Table 8 The Values of RST, T and P after RESET

 

Reset Type

 

 

T

 

 

P

 

 

 

Power on

 

 

1

 

 

 

1

 

 

 

/RESET during Operating mode

 

 

*P

 

 

*P

 

 

/RESET wake-up during SLEEP1 mode

 

 

1

 

 

 

0

 

 

 

/RESET wake-up during SLEEP2 mode

 

 

*P

 

 

*P

 

 

WDT during Operating mode

 

 

0

 

 

 

*P

 

 

WDT wake-up during SLEEP1 mode

 

 

0

 

 

 

0

 

 

 

WDT wake-up during SLEEP2 mode

 

 

0

 

 

 

*P

 

 

Wake-Up on pin change during SLEEP2 mode

 

 

*P

 

 

*P

 

 

 

*P: Previous status before reset

Table 9 The Events that may Affect the T and P Status

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Event

 

 

T

 

 

 

P

 

 

 

Power on

 

 

1

 

1

 

 

 

WDTC instruction

 

 

1

 

1

 

 

 

WDT time-out

 

 

0

 

 

 

*P

 

 

SLEP instruction

 

 

1

 

0

 

 

 

Wake-Up on pin change during SLEEP2 mode

 

 

*P

 

 

 

*P

 

*P: Previous value before reset

Product Specification (V1.1) 03.30.2005

21

(This specification is subject to change without further notice)

Page 25
Image 25
IBM EM78P447N Status of RST, T, and P of Status Register, Previous status before reset, Previous value before reset, Event