
EM78P447N
Table 3 EM78P447NBP and EM78P447NBWM Pin Description
| Symbol | Pin No. | Type | Function | 
| VDD | 4 | - | ■ Power supply. | 
| OSCI | 29 | I | ■ XTAL type: Crystal input terminal or external clock input pin. | |
| ■ RC type: RC oscillator input pin. | ||||
| 
 | 
 | 
 | ||
| 
 | 
 | 
 | ■ XTAL type: Output terminal for crystal oscillator or external clock input pin. | |
| OSCO | 28 | I/O | ■ RC type: Instruction clock output. | |
| 
 | 
 | 
 | ■ External clock signal input. | |
| TCC | 3 | I | ■ The real time clock/counter (with Schmitt trigger input pin), must be tied to | |
| VDD or VSS if not in use. | ||||
| 
 | 
 | 
 | ||
| /RESET | 30 | I | ■ Input pin with Schmitt trigger. If this pin remains at logic low, the controller | |
| will keep in reset condition. | ||||
| 
 | 
 | 
 | ||
| P50~P57 | 8~11,2~1, | I/O | ■ P50~P57 are  | |
| 
 | 32~31 | 
 | 
 | |
| P60~P67 | 12~19 | I/O | ■ P60~P67 are  | |
| software control. | ||||
| 
 | 
 | 
 | ||
| 
 | 
 | 
 | ■ P70~P77 are  | |
| P70~P77 | 20~27 | I/O | ■ P74~P75 can be  | |
| ■ P76~P77 can have  | ||||
| 
 | 
 | 
 | ||
| 
 | 
 | 
 | ■ P70 and P71 can also be defined as the  | |
| /INT | 7 | I | ■ External interrupt pin triggered by falling edge. | |
| VSS | 6 | - | ■ Ground. | |
| NC | 5 | - | ■ No connection. | 
Table 4 EM78P447NCK and EN78P447NCM Pin Description
| Symbol | 
 | Pin No. | 
 | Type | 
 | Function | 
 | 
| VDD | 
 | 3 | 
 | - | 
 | ■ Power supply. | |
| OSCI | 
 | 23 | 
 | I | 
 | ■ XTAL type: Crystal input terminal or external clock input pin. | |
| 
 | 
 | 
 | ■ RC type: RC oscillator input pin. | ||||
| 
 | 
 | 
 | 
 | 
 | 
 | ||
| 
 | 
 | 
 | 
 | 
 | 
 | ■ XTAL type: Output terminal for crystal oscillator or external clock input pin. | |
| OSCO | 
 | 22 | 
 | I/O | 
 | ■ RC type: Instruction clock output. | |
| 
 | 
 | 
 | 
 | 
 | 
 | ■ External clock signal input. | |
| TCC | 
 | 2 | 
 | I | 
 | ■ The real time clock/counter (with Schmitt trigger input pin) must be tied to | |
| 
 | 
 | 
 | VDD or VSS if not in use. | ||||
| 
 | 
 | 
 | 
 | 
 | 
 | ||
| /RESET | 
 | 24 | 
 | I | 
 | ■ Input pin with Schmitt trigger. If this pin remains at logic low, the controller | |
| 
 | 
 | 
 | will also remain in reset condition. | ||||
| 
 | 
 | 
 | 
 | 
 | 
 | ||
| P50~P54 | 
 | 6~9,1 | 
 | I/O | 
 | ■ P50~P54 are  | |
| P60~P67 | 
 | 10~17 | 
 | I/O | 
 | ■ P60~P67 are  | |
| 
 | 
 | 
 | software control. | ||||
| 
 | 
 | 
 | 
 | 
 | 
 | ||
| 
 | 
 | 
 | 
 | 
 | 
 | ■ P74~P77 are  | |
| P74~P77 | 
 | 18~21 | 
 | I/O | 
 | ■ P74~P75 can be  | |
| 
 | 
 | 
 | 
 | 
 | 
 | ■ P76~P77 can have  | |
| /INT | 
 | 5 | 
 | I | 
 | ■ External interrupt pin triggered by falling edge. | |
| VSS | 
 | 4 | 
 | - | 
 | ■ Ground. | |
| NC | 
 | 3 | 
 | - | 
 | ■ No connection. | |
| Product Specification (V1.1) 03.30.2005 | • 5 | 
(This specification is subject to change without further notice)
