IBM EM78P447N manual Data Memory Configuration

Models: EM78P447N

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Fig. 4 Data Memory Configuration

EM78P447N

8-Bit Microcontroller with OTP ROM

Aaddress

R PAGE registers

IOC PAGE registers

00

01

02

03

04

05

06

07

08

09

0A

0B

0C

0D

0E

0F

10

1F

20

3E

R0 (Indirect Addressing Register)

R1 (Time Clock Counter)

R2 (Program Counter)

R3 (Status Register)

R4 (RAM Select Register)

R5 (Port5)

R6 (Port6)

R7 (Port7)

General Register

General Register

General Register

General Register

General Register

General Register

General Register

General Register

General Registers

Bank0 Bank1 Bank2 Bank3

Reserve

CONT (Control Register)

Reserve

Reserve

Reserve

IOC5 (I/O Port Control Register)

IOC6 (I/O Port Control Register)

IOC7 (I/O Port Control Register)

Reserve

Reserve

Reserve

IOCB (Wake-Up Control Register for Port6 )

Reverse

Reverse

IOCE (WDT,SLEEP2,Open Drain,R -Option Control Register)

IOCF (Interrupt Mask Register)

3F

R3F (Interrupt Status Register)

Fig. 4 Data Memory Configuration

Product Specification (V1.1) 03.30.2005

9

(This specification is subject to change without further notice)

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IBM EM78P447N manual Data Memory Configuration