Contents

Contents
7	VCC5 Current-Limiting Resistor	38
8	AC Test Load	45
9	CLKIN Waveform	46
10	Output Delay Waveform	46
11	Output Delay Waveform	46
12	Output Float Waveform	47
13	Input Setup and Hold Waveform	47
14	NMI, XINT7:0 Input Setup and Hold Waveform	47
15	Hold Acknowledge Timings	48
16	Bus Backoff (BOFF) Timings	48
17	TCK Waveform	49
18	Input Setup and Hold Waveforms for TBSIS1 and TBSIH1	49
19	Output Delay and Output Float for TBSOV1 and TBSOF1	50
20	Output Delay and Output Float Waveform for TBSOV2 and TBSOF2	50
21	Input Setup and Hold Waveform for TBSIS2 and TBSIH2	50
22	Rise and Fall Time Derating at 85 ° C and Minimum VCC	51
23	ICC Active (Power Supply) vs. Frequency	51
24	ICC Active (Thermal) vs. Frequency	52
25	Output Delay or Hold vs. Load Capacitance	52
26	Output Delay vs. Temperature	53
27	Output Hold Times vs. Temperature	53
28	Output Delay vs. VCC	53
29	Cold Reset Waveform	54
30	Warm Reset Waveform	55
31	Entering ONCE Mode	56
32	Non-Burst, Non-Pipelined Requests without Wait States	57
33	Non-Burst, Non-Pipelined Read Request with Wait States	58
34	Non-Burst, Non-Pipelined Write Request with Wait States	59
35	Burst, Non-Pipelined Read Request without Wait States, 32-Bit Bus	60
36	Burst, Non-Pipelined Read Request with Wait States, 32-Bit Bus	61
37	Burst, Non-Pipelined Write Request without Wait States, 32-Bit Bus	62
38	Burst, Non-Pipelined Write Request with Wait States, 32-Bit Bus	63
39	Burst, Non-Pipelined Read Request with Wait States, 16-Bit Bus	64
40	Burst, Non-Pipelined Read Request with Wait States, 8-Bit Bus	65
41	Non-Burst, Pipelined Read Request without Wait States, 32-Bit Bus	66
42	Non-Burst, Pipelined Read Request with Wait States, 32-Bit Bus	67
43	Burst, Pipelined Read Request without Wait States, 32-Bit Bus	68
44	Burst, Pipelined Read Request with Wait States, 32-Bit Bus	69
45	Burst, Pipelined Read Request with Wait States, 8-Bit Bus	70
46	Burst, Pipelined Read Request with Wait States, 16-Bit Bus	71
47	Using External READY	72
48	Terminating a Burst with BTERM	73
49	BREQ and BSTALL Operation	74
50	BOFF Functional Timing. BOFF occurs during a burst or non-burst data cycle	75
51	HOLD Functional Timing	76
52	LOCK Delays HOLDA Timing	77
53	FAIL Functional Timing	77
54	A Summary of Aligned and Unaligned Transfers for 32-Bit Regions	78
55	A Summary of Aligned and Unaligned Transfers for 32-Bit Regions (Continued)	79
56	A Summary of Aligned and Unaligned Transfers for 16-Bit Bus	80

Datasheet

80960HT, 80960HA, 80960HD specifications

The Intel 80960 family of microprocessors, introduced in the late 1980s, marked a significant evolution in the landscape of embedded systems and high-performance computing. The series included notable members such as the 80960HD, 80960HA, and 80960HT, each offering distinct features, technologies, and characteristics tailored for specific applications.

The Intel 80960HD was primarily designed for high-performance applications, such as real-time processing and advanced embedded control systems. With a robust architecture, the 80960HD featured a 32-bit data bus and a 32-bit address bus, enabling it to access a larger memory space and providing superior performance for computational tasks. It included a sophisticated instruction set that facilitated efficient execution, particularly for computationally intensive tasks. The internal architecture also supported pipelining, allowing multiple instructions to be processed simultaneously, thus enhancing throughput.

The 80960HA variant was tailored for high-availability applications, making it ideal for embedded systems where reliability is paramount. This model incorporated features that emphasized fault tolerance and stability, ensuring that systems relying on it could maintain operational integrity even in the event of component failures. The 80960HA showcased enhanced error detection and correction capabilities, which contributed to its reputation as a dependable choice for mission-critical applications.

On the other hand, the 80960HT was designed to meet the needs of high-performance telecommunications and networking applications. Recognized for its ability to handle multiple tasks concurrently, the 80960HT included advanced features such as built-in support for multitasking and real-time processing. This made it an excellent fit for applications that demanded rapid data handling and processing, such as routers and switches in networking environments. Its architecture allowed for efficient context switching, ensuring that multiple processes could execute seamlessly.

All three variants utilized the same family architecture, enabling easy integration and compatibility across different applications. They also supported various memory management techniques, such as virtual memory and caching, enhancing their performance in diverse operating conditions. With their combination of high processing power, reliability, and flexibility, the Intel 80960 family of microprocessors played a crucial role in advancing embedded computing technologies, paving the way for modern-day processors and systems. The 80960 series remains a noteworthy chapter in the evolution of microprocessor design, reflecting the growing demands of the computing landscape during its time.

Intel 80960HT, 80960HD, 80960HA manual Contents

Models: 80960HT 80960HA 80960HD

Datasheet

80960HT, 80960HA, 80960HD specifications