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| Contents |
57 | A Summary of Aligned and Unaligned Transfers for | 81 |
58 | Idle Bus Operation | 82 |
59 | Bus States | 83 |
Tables |
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1 | 80960Hx Product Description | 9 |
2 | Fail Codes For BIST (bit 7 = 1) | 12 |
3 | Remaining Fail Codes (bit 7 = 0) | 12 |
4 | 80960Hx Instruction Set | 13 |
5 | 80960HA/HD/HT Package Types and Speeds | 14 |
6 | Pin Description Nomenclature | 15 |
7 | 80960Hx Processor Family Pin Descriptions | 16 |
8 | 80960Hx | 22 |
9 | 80960Hx | 24 |
10 | 80960Hx PQ4 Pinout— Signal Name Order | 27 |
11 | 80960Hx PQ4 Pinout— Pin Number Order | 29 |
13 | 80960Hx | 32 |
12 | Maximum TA at Various Airflows in °C (PGA Package Only) | 32 |
15 | 80960Hx | 33 |
14 | Maximum TA at Various Airflows in °C (PQ4 Package Only) | 33 |
17 | 80960Hx Device ID Model Types | 35 |
18 | Device ID Version Numbers for Different Steppings | 35 |
16 | Fields of 80960Hx Device ID | 35 |
19 | Absolute Maximum Ratings | 37 |
20 | Operating Conditions | 37 |
21 | VDIFF Specification for Dual Power Supply Requirements (3.3 V, 5 V) | 39 |
22 | 80960Hx DC Characteristics | 40 |
23 | 80960Hx AC Characteristics | 42 |
25 | 80960Hx Boundary Scan Test Signal Timings | 44 |
24 | AC Characteristics Notes | 44 |
26 | 80960Hx Boundary Scan Chain | 84 |
Datasheet | 5 |