80960HA/HD/HT
Figure 48. Terminating a Burst with BTERM
CLKIN
ADS
A31:4, SUP, CT3:0, D/C, BE3:0, LOCK
W/R
BLAST
DT/R
DEN
READY
BTERM
A3:2
WAIT
D31:0,
DP3:0
PCHK
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| NRAD = 0, NRDD = 0, NRDA = 0 |
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| Ready Enabled |
| ||
A | D 1 | A D 1 | A | D 1 D | 1 |
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| Valid |
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|
|
|
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| See Note |
| |
| 00 | 01 |
| 10 | 11 |
| D0 | D1 |
| D2 | D3 |
Note: READY adds memory access time to data transfers, whether or not the bus access is a burst access. BTERM interrupts a bus access, whether or not the bus access has more data transfers pending. Either the READY signal or the BTERM signal terminates a bus access when the signal is asserted during the last (or only) data transfer of the bus access.
Datasheet | 73 |