Introduction
R
1.1Definition of Terms
Term | Description |
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BGA | Ball grid array. A package type, defined by a |
| mounted, bonded and encapsulated in molding compound. The primary electrical interface is |
| an array of solder balls attached to the substrate opposite the die and molding compound. |
|
|
BLT | Bond line thickness. Final settled thickness of the thermal interface material after installation |
| of heatsink. |
|
|
ICH7 | I/O Controller Hub. Seventh generation I/O Controller Hub component that contains |
| additional functionality compared to previous ICH components. The I/O Controller Hub |
| component that contains the primary PCI interface, LPC interface, USB2, |
| other I/O functions. It communicates with the MCH over a proprietary interconnect called |
| DMI. |
|
|
MCH | Memory Controller Hub. The chipset component that contains the processor interface, the |
| memory interface, and the DMI. |
|
|
Tcase_max | Maximum die temperature allowed. This temperature is measured at the geometric center of |
| the top of the package die. |
|
|
Tcase_min | Minimum die temperature allowed. This temperature is measured at the geometric center of |
| the top of the package die. |
|
|
TDP | Thermal design power. Thermal solutions should be designed to dissipate this target power |
| level. TDP is not the maximum power that the chipset can dissipate. |
|
|
1.2Reference Documents
The reader of this specification should also be familiar with material and concepts presented in the following documents:
Document Title | Document Number / Location |
|
|
Intel® I/O Controller Hub 7 (ICH7) Thermal Design Guidelines | |
| |
|
|
Intel® I/O Controller Hub 7 (ICH7) Datasheet | |
| |
|
|
Intel® 955X Express Chipset Datasheet | |
| |
|
|
BGA/OLGA Assembly Development Guide | Contact your Intel Field Sales |
| Representative |
|
|
Various system thermal design suggestions | |
|
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§
8 | Intel® 955X Express Chipset Thermal/Mechanical Design Guide |