KEY CCHE?TS

In a 432-based system, the bulk of processing required to support inplt/out];Xlt operations is delegated to Peripheral Subsystems; this includes device control, timing, interrupt handling and buffer ing • A Peripheral Subsystem is an autonomous computer system with its own memory, I/O devices am controllers, at least one processor, and software. The number of Peripheral Subsystems employed in any given application depems on the I/O-intensiveness of the application; the number may be var ied with changing needs, and is independent of the number of GDPs in the system.

A Peripheral Subsystem resembles a conventional mainframe channel in that it assumes responsibility for l~level I/O device su~rt and executes in parallel with 432 system processor(s). Unlike a simple channel, however, each Peripheral Subsystem can be configured with a complement of hardware and software resources that precisely fits

application cost am performance requirements. In general, any system that can oonmunicate over a standard 8- or l6-bit microcooputer bus, such as Intel's Multibus'IM design, may serve as a 432 Peripheral Subsystem.

A Peripheral Subsystem is attached to the 432 system by means of an

iAPX 432 Interface Processor (IP). At the hardware level, an Interface Processor presents two separate bus interfaces. One of these is the standard 432 processor packet bus and the other is a very general interface that can be adapted to nost traditional 8- and 16-bit microcomputer buses.

The Interface Processor is driven by Peripheral Subsystem software. 'lb sUQ?Ort the transfer of information through the wall that separates a Peripheral Subsystem from the 432 system, the IP provides a set of software-controlled windows. A window is used to expose a single object (data structure) in 432 system memory so that its contents may be transferred to or from the Peri.pheral

Subsystem. Tb preserve the integrity of the capability-based protection mechanisms in the 432 system, the IP only provides the PS with windowed access to 432 objects which are of system type data segment.

An Interface Processor additionally provides a set of functions, which are also invoked by Peripheral Subsystem software. While the operation of these functions (and the returned results) varies considerably, they generally permit objects in 432 system memory to be manipulated as entities, and enable conmunication between 432 system processes and software executing in a Peripheral Subsystem.

1-3

Page 12
Image 12
Intel iapx 432 manual Key Cche?Ts