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System BIOS
CBI/CGI Technical Reference
Chassis Plans
3-16
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Copyright 2003 by Trenton Technology Inc. All rights reserved.
Contents
Main
CBI/CGI CB BASIC
Page
Page
Page
Chassis Plans i
Chassis Plansii
Chassis Plans iii
Page
Chassis Plans v
Page
Chassis Plans 1-1
Chapter 1 Specifications
Chassis Plans1-2
Chassis Plans 1-3
Chassis Plans1-4
Page
Page
Chassis Plans 1-7
Chassis Plans1-8
Chassis Plans 1-9
Chassis Plans1-10
Chassis Plans 1-11
Chassis Plans1-12
Chassis Plans 1-13
Chassis Plans1-14
Chassis Plans 1-15
Chassis Plans1-16
Chassis Plans 1-17
Chassis Plans1-18
Chassis Plans 1-19
Chassis Plans1-20
Chassis Plans 1-21
Chassis Plans1-22
Chapter 2 ISA/PCI Reference
Chassis Plans2-2
ISA BUS PIN
Chassis Plans 2-3
ISA BUS SIGNAL D
The following is a description of the ISA Bus signals. All signal lines are TTL- compatible.
AEN (O)
BALE (O) (Buffered)
Chassis Plans2-4
Chassis Plans 2-5
NOWS# (I)
OSC (O)
REFRESH# (I/O)
RESDRV (O)
Page
Chassis Plans 2-7
I/O ADDRESS MAP*
INTERRUPT A
* These are typical parameters, which may not reflect your current system.
Chassis Plans2-8
Chassis Plans 2-9
PCI LOCAL BUS SIGNAL DEFINITION
PCI Pin List
Required Pins:
PCI COMPLIANT DEVICE
Page
Chassis Plans 2-11
PCI LOCAL BUS
are Connector Keys on the 3.3-volt connector.
volt connector.
but are Gnd (ground) on the 3.3-volt connector.
Chassis Plans2-12
Chassis Plans 2-13
PCI LOCAL BUS PIN ASSIGNMENTS
The following pin assignments apply only to backplanes with 64-bit PCI option slots.
Chassis Plans2-14
Chassis Plans 2-15
Chassis Plans2-16
Chassis Plans 2-17
Chassis Plans2-18
PICMG EDGE CONNECTOR PIN
Chassis Plans 2-19
PICMG EDGE CONNECTOR PIN ASSIGNMENTS (
Chassis Plans2-20
PICMG EDGE CONNECTOR PIN ASSIGNMENTS
The following pin assignments apply only to SBCs with 64-bit PICMG connectors.
Copyright 2003 by Trenton Technology Inc. All rights reserved.
Chassis Plans 3-1
Chapter 3 System BIOS
Chassis Plans3-2
Chassis Plans 3-3
Chassis Plans3-4
Chassis Plans 3-5
Chassis Plans3-6
Chassis Plans 3-7
Chassis Plans3-8
Chassis Plans 3-9
Chassis Plans3-10
Chassis Plans 3-11
Chassis Plans3-12
Chassis Plans 3-13
Chassis Plans3-14
Chassis Plans 3-15
Page
Chassis Plans 4-1
Chapter 4 Standard CMOS Setup
Chassis Plans4-2
Chassis Plans 4-3
Chassis Plans4-4
Chassis Plans 4-5
Chassis Plans4-6
Chassis Plans 4-7
Page
Chassis Plans 5-1
Chapter 5 Advanced Setup
Chassis Plans5-2
Chassis Plans 5-3
Chassis Plans5-4
Chassis Plans 5-5
Chassis Plans5-6
Chassis Plans 5-7
Chassis Plans5-8
Chassis Plans 5-9
Page
Chassis Plans 5-11
Chassis Plans5-12
Chassis Plans 5-13
Chassis Plans5-14
Chassis Plans 5-15
Chassis Plans5-16
Chassis Plans 5-17
Chassis Plans5-18
Chassis Plans 5-19
Page
Chassis Plans. 6-1
Chapter 6 Power Management Setup
Chassis Plans.6-2
Chassis Plans. 6-3
Chassis Plans.6-4
Chassis Plans. 6-5
Chassis Plans.6-6
Chassis Plans. 7-1
Chapter 7 PCI/Plug and Play Setup
Chassis Plans.7-2
Chassis Plans. 7-3
Chassis Plans.7-4
Chassis Plans. 7-5
Chassis Plans.7-6
Chassis Plans 8-1
Chapter 8 Peripheral Setup
Peripheral Setup CBI/CGI Technical Reference
Chassis Plans8-2
Chassis Plans 8-3
Peripheral Setup CBI/CGI Technical Reference
Chassis Plans8-4
Chassis Plans 8-5
Page
Chassis Plans A-1
Appendix A BIOS Messages
Chassis PlansA-2
Chassis Plans A-3
BIOS ERROR MESSAGES (
Chassis PlansA-4
BIOS ERROR MESSAGES (
Chassis Plans A-5
ISA BIOS NMI HANDLER
Chassis PlansA-6
Chassis Plans A-7
Chassis PlansA-8
Chassis Plans A-9
Chassis PlansA-10
Chassis Plans A-11
Chassis PlansA-12
Chassis Plans B-1
Appendix B Adaptec, Inc. Software License
Chassis PlansB-2
Chassis Plans C-1
Appendix C SCSISelect Configuration Utility
Page
Chassis Plans C-3
Chassis PlansC-4
Chassis Plans C-5
Chassis PlansC-6
Chassis Plans C-7
Chassis PlansC-8
Chassis Plans C-9
Chassis PlansC-10
Page
Chassis PlansC-12
Chassis Plans C-13
Chassis PlansC-14
Chassis Plans C-15
Chassis PlansC-16
Chassis Plans C-17
Page
Declaration of Conformity
