Maxim MAX12527 -THD, SFDR vs. ANALOG SUPPLY VOLTAGE, SNR, SINAD vs. DIGITAL SUPPLY VOLTAGE, -THD, SFDR vs. DIGITAL SUPPLY VOLTAGE, SNR, SINAD vs. DIGITAL SUPPLY VOLTAGE, -THD, SFDR vs. DIGITAL SUPPLY VOLTAGE, PDISS, IVDD (ANALOG) vs. ANALOG SUPPLY VOLTAGE, PDISS, IOVDD (DIGITAL) vs. DIGITAL SUPPLY VOLTAGE, SNR, SINAD vs. CLOCK DUTY CYCLE, -THD, SFDR vs. CLOCK DUTY CYCLE

MAX12527
Dual, 65Msps, 12-Bit, IF/Baseband ADC
10 ______________________________________________________________________________________
-THD, SFDR vs. ANALOG SUPPLY VOLTAGE
(fCLK = 65.00352MHz, fIN = 175MHz)
MAX12527 toc22
VDD (V)
-THD, SFDR (dBc)
3.53.43.33.23.1
65
70
75
80
85
90
60
3.0 3.6
-THD
SFDR
SNR, SINAD vs. DIGITAL SUPPLY VOLTAGE
(fCLK = 65.00352MHz, fIN = 70MHz)
MAX12527 toc23
OVDD (V)
SNR, SINAD (dB)
3.33.02.72.42.11.8
62
64
66
68
70
72
60
1.5 3.6
SNR
SINAD
-THD, SFDR vs. DIGITAL SUPPLY VOLTAGE
(fCLK = 65.00352MHz, fIN = 70MHz)
MAX12527 toc24
OVDD (V)
-THD, SFDR (dBc)
3.33.02.72.42.11.8
65
70
75
80
85
90
60
1.5 3.6
-THD
SFDR
SNR, SINAD vs. DIGITAL SUPPLY VOLTAGE
(fCLK = 65.00352MHz, fIN = 175MHz)
MAX12527 toc25
OVDD (V)
SNR, SINAD (dB)
3.33.02.72.42.11.8
62
64
66
68
70
72
60
1.5 3.6
SNR
SINAD
-THD, SFDR vs. DIGITAL SUPPLY VOLTAGE
(fCLK = 65.00352MHz, fIN = 175MHz)
MAX12527 toc26
OVDD (V)
-THD, SFDR (dBc)
3.33.02.72.42.11.8
65
70
75
80
85
90
60
1.5 3.6
-THD
SFDR
PDISS, IVDD (ANALOG) vs. ANALOG SUPPLY VOLTAGE
(fCLK = 65.00352MHz, fIN = 175MHz)
MAX12527 toc27
VDD (V)
PDISS, IVDD (mW, mA)
3.53.43.33.23.1
100
200
300
400
500
600
700
800
900
0
3.0 3.6
PDISS (ANALOG)
IVDD
PDISS, IOVDD (DIGITAL) vs. DIGITAL SUPPLY VOLTAGE
(fCLK = 65.00352MHz, fIN = 175MHz)
MAX12527 toc28
OVDD (V)
PDISS, IOVDD (mW, mA)
3.33.01.8 2.1 2.4 2.7
10
20
30
40
50
60
70
80
0
1.5 3.6
PDISS (DIGITAL)
CL ≈ 5pF
IOVDD
SNR, SINAD vs. CLOCK DUTY CYCLE
(fIN = 70MHz, AIN = -0.5dBFS)
MAX12527 toc29
CLOCK DUTY CYCLE (%)
SNR, SINAD (dB)
65554535
62
64
66
68
70
72
60
25 75
SNR
SINAD
SINGLE-ENDED CLOCK INPUT DRIVE
-THD, SFDR vs. CLOCK DUTY CYCLE
(fIN = 70MHz, AIN = -0.5dBFS)
MAX12527 toc30
CLOCK DUTY CYCLE (%)
-THD, SFDR (dBc)
65554535
65
70
75
80
85
90
60
25 75
-THD
SFDR
SINGLE-ENDED CLOCK INPUT DRIVE
Typical Operating Characteristics (continued)
(VDD = 3.3V, OVDD = 2.0V, GND = 0, REFIN = REFOUT (internal reference mode), CL≈5pF at digital outputs, VIN = -0.5dBFS,
DIFFCLK/SECLK= OVDD, PD = GND, G/T= GND, fCLK = 65MHz (50% duty cycle), TA= +25°C, unless otherwise noted.)