Dual, 65Msps, 12-Bit, IF/Baseband ADC
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| Pin Description (continued) | |
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PIN | NAME |
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30 | D0B | Channel B CMOS Digital Output, Bit 0 (LSB) | |||
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31 | D1B | Channel B CMOS Digital Output, Bit 1 | |||
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32 | D2B | Channel B CMOS Digital Output, Bit 2 | |||
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33 | D3B | Channel B CMOS Digital Output, Bit 3 | |||
34 | D4B | Channel B CMOS Digital Output, Bit 4 | |||
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35 | D5B | Channel B CMOS Digital Output, Bit 5 | |||
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36 | D6B | Channel B CMOS Digital Output, Bit 6 | |||
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37 | D7B | Channel B CMOS Digital Output, Bit 7 | |||
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38 | D8B | Channel B CMOS Digital Output, Bit 8 | |||
39 | D9B | Channel B CMOS Digital Output, Bit 9 | |||
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40 | D10B | Channel B CMOS Digital Output, Bit 10 | |||
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41 | D11B | Channel B CMOS Digital Output, Bit 11 (MSB) | |||
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| Channel B Data | |||
42 | DORB | input voltage is out of range. | |||
DORB = 1: Digital outputs exceed | |||||
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| DORB = 0: Digital outputs are within | |||
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44 | DAV | The MAX12527 evaluation kit (MAX12557 EV kit) utilizes DAV to latch data into any external | |||
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47 | D0A | Channel A CMOS Digital Output, Bit 0 (LSB) | |||
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48 | D1A | Channel A CMOS Digital Output, Bit 1 | |||
49 | D2A | Channel A CMOS Digital Output, Bit 2 | |||
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50 | D3A | Channel A CMOS Digital Output, Bit 3 | |||
51 | D4A | Channel A CMOS Digital Output, Bit 4 | |||
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52 | D5A | Channel A CMOS Digital Output, Bit 5 | |||
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53 | D6A | Channel A CMOS Digital Output, Bit 6 | |||
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54 | D7A | Channel A CMOS Digital Output, Bit 7 | |||
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55 | D8A | Channel A CMOS Digital Output, Bit 8 | |||
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56 | D9A | Channel A CMOS Digital Output, Bit 9 | |||
57 | D10A | Channel A CMOS Digital Output, Bit 10 | |||
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58 | D11A | Channel A CMOS Digital Output, Bit 11 (MSB) | |||
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| Channel A Data | |||
59 | DORA | input voltage is out of range. | |||
DORA = 1: Digital outputs exceed | |||||
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| DORA = 0: Digital outputs are within | |||
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| Output Format Select Digital Input. | |||
64 | G/T | G/T = GND: | |||
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| G/T = OVDD: | |||
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65 | PD | PD = GND: ADCs are fully operational. | |||
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| PD = OVDD: ADCs are powered down. |
MAX12527
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