Chapter3 HardwareOverview
©NationalInstruments Corporation 3-9 6023E/6024E/6025EUser Manual
scheme reducesthe needto change physical connections to the I/O
connector for different applications.
Youcan also individually enable each of the PFI pins to output a specific
internaltiming signal. For example, if you need the UPDATE* signal as an
output on the I/O connector,software can turn on the output driver for the
PFI5/UPDATE*pin.
Device and RTSI Clocks♦PCIandPXIbuses
Manydevice functions require a frequency timebase to generate the
necessary timing signals for controlling A/D conversions,DAC updates,
orgeneral-purpose signalsat theI/O connector.
Thesed evicescan use either its internal 20 MH z timebase or a timebase
receivedover the RTSI bus. In addition, if you configure the device to use
theint ernal timebase, you can also program the device to driveits internal
timebaseover the RTSI bus to another devicethat is programmed to receive
thistimebase signal. This clock source, whether local or from t he RTSIbus,
isused directly by the device as the primary frequency source. The default
configurationat startup is to use the internal tim ebase without drivingthe
RTSIbus timebase signal. This timebase is software selectable.
♦PXI-6025E
The RTSIclock connects to other devices through the PXI trigger bus on
thePXI backplane. The RTSI clock signal uses the PXI trigger <7> line for
thisconnection.
RTSI Triggers♦PCIandPXIbuses
The sevenRTSI trigger lines on the RTSI bus provide a very flexible
interconnection scheme for any devicesharing the RTSI bus. These
bidirectional lines can driveany of eight timing signals onto the RTSI bus
andcan receive any of these timing signals. This signal connection scheme
is shownin Figure 3-5 for PCI devices and Figure 3-6 for PXI devices.