National Instruments 6023E, 6024E, 6025E Timing Specifications

Chapter4 SignalConnections
©NationalInstruments Corporation 4-25 6023E/6024E/6025EUser Manual
2. Using the followingformula, calculate the largest possible load to
maintain a logic lowlevel of 0.4 V and supply the maximum driving
current:
V=I×RL⇒ RL =V/I
where:
V= 0.4 V Voltageacross RL
I=46µA+10µA 4.6 V across the 100 kΩpull-up resistor
and 10 µA maximum leakage current
Therefore:
RL=7.1kΩ;0.4V/56µA
Thisresi stor value,7.1 kΩ, provides a maximum of 0.4 V on the DIO line
atpower up. You can substitute smaller resistor values to lowerthe voltage
or to provide a marginfor Vcc variations and other factors. However,
smaller valuesdraw more current, leaving less drive current for other
circuitry connected to this line. The 7.1 kΩresistor reduces the amount of
logic high source current by 0.4 mA with a 2.8 V output.
Timing Specifications
♦6025E only
This section lists the timing specifications for handshaking with your
6025E PC<0..7> lines. The handshaking lines STB* and IBF synchronize
input transfers.T he handshaking lines OBF* and ACK*synchronize
outputtransfers. Table 4-5describes signals appearing in the handshaking
diagrams.
Table4-5. Signal Names Used in Timing Diagrams
Name Type Description
STB* Input Strobeinput—a low signal on this handshaking line loads data into
theinput latch.
IBF Output Input bufferfull—a high signal on this handshaking line indicates
thatdata has been loaded into the input latch. A low signal indicates
the deviceis ready for more d ata. This is an input acknowledge
signal.