1-4
SUPERSERVER 5017P-TLN4F/TF User's Manual
Figure 1-1. Intel QM77 Chipset:
System Block Diagram
Note: This is a general block diagram. Please see Chapter 5 for details.
LPC
2X Stacked 2 port rear I/O
P/S2
COM1 (rear I/O)
COM2 (internal header)
NCT6776F
LPC I/O
4x SATA PORTS GLAN2
82574L
2.5GT/s
PCIe1.0_x1
DDR3 (CHA)
PCIe3.0_x16
IMVP 7
SVID
PCIe x16 SLOT
RJ45
RJ45
ECC-SODIMM2
ECC-SODIMM1
DDR3 (CHB)
1333/1067 MHz
8.0GT/s
5.0GT/s
DMI 2.0 x4
2x SATA PORTS
USB2.0
SATA 6Gb/s
PCIe1.0_x1
2.5GT/s
GLAN1
82574L
Debug Header
x2 TWO PORT HEADERs
FDI X4
SATA 3Gb/s
USB3.0
4x USB3.0 by Header
VGA
GLAN3
82574L
2.5GT/s
PCIe1.0_x1
RJ45
GLAN4
82574L
2.5GT/s
PCIe1.0_x1
RJ45
NCSI
PCIE[0]
RGB
SATA[1:0]
SATA[5:2]
USB[3:0]
USB[13:4]
LPC
SPI
TPM
2.5GT/s
PCIe1.0_x1IDT
PEB383
PCIE[1]
PCIE[2]
PCIE[3]
PCIE[4]
PHYDedicated Lan
PCI
for IPMI SKU
fornon-IPMI SKU
SPI
FLASH
SPI 64Mb
1333/1067 MHz