Intel 41110 manual Pci

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Power Plane Layout

Note: Linear voltage regulators are recommended when using 1.5 Volt power supplies.

Figure 9. 41110 Bridge Single-Layer Split Voltage Plane

Core

PCI

Express

B2715-01

20	Intel® 41110 Serial to Parallel PCI Bridge Design Guide

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Contents Intel 41110 Serial to Parallel PCI Bridge Design GuideIntel 41110 Serial to Parallel PCI Bridge Design Guide Contents Figures TablesContents Revision History Date Revision Description March 001 Initial releaseAbout This Document Terminology and DefinitionsTerminology and Definitions Sheet 1 Term DefinitionAbout This Document Terminology and Definitions Sheet 2Introduction2 PCI Express Interface FeaturesPCI-X Interface Features Power Management SMBus for configuration register initializationSMBus Interface IntroductionMicrocontroller Block Diagram Microcontroller Connections toJtag Related DocumentsBlock Diagram Intel 41110 Serial to Parallel PCI Bridge ApplicationsAdapter Card Block Diagram Package Specification Package InformationBridge Package Dimensions Side View Package InformationPower Plane Layout 41110 Decoupling GuidelinesPower Plane Layout Split Voltage Planes Decoupling Guidelines41110 300PCI VCC15 and VCC33 Voltage Requirements Reset and Power Timing Considerations5ARST# and PERST# Timing Requirements Reset and Power Timing Considerations Crosstalk General Routing GuidelinesGeneral Routing Guidelines EMI Considerations General Routing GuidelinesDecoupling Power Distribution and DecouplingTrace Impedance Differential Impedance Cross Section of Differential TraceAdapter Card Stack Up, Microstrip and Stripline Board Layout GuidelinesAdapter Card Topology Board Layout Guidelines Adapter Card StackupAINT# Interrupt Pins PCI Express INTx Message PCI-X Layout GuidelinesInterrupts INTx Routing TablePCI Arbitration Interrupt Routing for Devices Behind a BridgePCI-X Layout Guidelines Interrupt Binding for Devices Behind a BridgePCI General Layout Guidelines PCI Resistor CompensationPCI-X Signals PCI Clock Layout GuidelinesPCI Pullup Resistors Not Required PCI/PCI-X Frequency/Mode StrapsPCI Clock Distribution and Matching Requirements PCI-X Clock Layout Requirements Summary Parameter Routing GuidelinesPCI-X Slot Guidelines PCI-X Topology Layout Guidelines41110 Layout Analysis Parameter Routing Guideline for Lower AD Bus Embedded PCI-X 133 MHzEmbedded PCI-X 133 MHz Routing Recommendations Embedded PCI-X 100 MHz Embedded PCI-X 100 MHz Routing RecommendationsPCI-X 66 MHz Embedded Topology PCI-X 66 MHz Embedded Routing RecommendationsPCI 66 MHz Embedded Topology PCI 66 MHz Embedded TablePCI 33 MHz Embedded Mode Topology PCI 33 MHz Embedded Routing RecommendationsPCI Express Layout General recommendationsPCI-Express Layout Guidelines Adapter Card Layout GuidelinesPCI Express Layout Adapter Card Routing Recommendations Sheet 1Adapter Card Routing Recommendations Sheet 2 This page intentionally left blank Config Circuit Implementations10.1 41110 Analog Voltage Filters Circuit ImplementationsPCI Analog Voltage Filters PCI Express Analog Voltage FilterBandgap Analog Voltage Filter PCI Express Analog Voltage Filter Circuit10.2 41110 Reference and Compensation Pins Bandgap Analog Voltage Filter CircuitBit Value SMBUs Address ConfigurationSM Bus This page intentionally left blank Layer Type Thickness Copper Weight Customer Reference BoardsBoard Stack-up CRB Board Stackup Sheet 1Material ImpedanceCustomer Reference Boards CRB Board Stackup Sheet 2Board Outline Mechanical OutlineThis page intentionally left blank Design Guide Checklist PCI Express Interface SignalsSignals Recommendations Reason/Impact PERCOMP10Design Guide Checklist PCI/PCI-X Interface Signals Sheet 1PCI/PCI-X Interface Signals Sheet 2 Miscellaneous SignalsSMBus Interface Signals Recommendations Reason/ImpactReset Pins Ballout Pin Name UsagePower and Ground Signals Signal Recommendations Reason/ImpactJtag Signals This page intentionally left blank