Analog Devices ADSP-21020 manual

Page 28

ADSP-21020

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

U

PMA17

PMA20

TMS

EGND

TCK

EVDD

RCOMP

EGND

PMACK

EVDD

PMWR

EGND

PMD44

EGND

PMD40

PMD39

PMD35

PMD31

U

T

EGND

PMA19

PMA23

PMS1

TRST

DMWR

DMACK

CLKIN

NC

NC

PMTS

PMD45

PMD42

NC

PMD37

PMD32

PMD30

PMD27

T

S

PMA11

PMA14

PMA18

PMA22

PMPAGE

TDI

DMTS

DMRD

NC

PMRD

PMD47

PMD43

PMD41

PMD36

PMD34

PMD28

PMD26

PMD21

S

R

EGND

PMA10

PMA15

PMA16

PMA21

PMS0

TDO

IGND

RESET

IVDD

PMD46

IGND

PMD38

PMD33

PMD29

PMD25

PMD23

EGND

R

P

PMA8

PMA9

PMA13

PMA12

PMD24 PMD22 PMD19 PMD18 P

N

EVDD

PMA5

PMA6

PMA7

PMD20

PMD17

PMD16

EVDD

N

M

PMA1

PMA4

PMA3

PMA2

PMD15

PMD14

PMD13

PMD12

M

L

EGND

PMA0

TIMEXP

IGND

IGND

PMD10

PMD11

EGND

L

K

EVDD

NC

IRQ2

IRQ3

ADSP-21020

PMD6

PMD7

PMD8

PMD9

K

TOP VIEW

J

EVDD

IRQ0

IRQ1

IVDD

(PINS DOWN)

IVDD

PMD2

PMD5

EVDD

J

H

EGND

FLAG2

FLAG0

FLAG1

DMD1

DMD0

PMD3

PMD4

H

G

FLAG3

DMA1

DMA0

IGND

IGND

DMD3

NC

EGND

G

F

DMA2

DMA3

DMA4

DMA5

DMD9

DMD6

PMD0

PMD1

F

E

DMA6

DMA7

DMA8

DMA10

DMD13

DMD10

DMD2

EGND

E

D

DMA9

DMA11

DMA12

DMA15

DMA19

DMA23

DMA27

IGND

DMS0

IVDD

DMD36

DMD31

DMD27

DMD22

DMD17

DMD11

DMD5

DMD4

D

C

DMA13

DMA14

DMA18

DMA20

DMA24

DMA28

DMA31

DMS1

NC

DMD38

DMD35

DMD30

DMD28

DMD24

DMD20

DMD15

DMD8

DMD7

C

B

DMA16

DMA17

DMA21

DMA25

DMA26

DMA30

DMPAGE

DMS3

DMD39

DMD37

DMD33

DMD32

DMD26

DMD25

DMD21

DMD18

DMD14

DMD12

B

A

BR

BG

DMA22

EGND

DMA29

EVDD

DMS2

EGND

DMD34

EVDD

DMD29

EGND

DMD23

EVDD

DMD19

EGND

DMD16

A

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

–28–

REV. C

Image 28

Contents ADSP-21020 ADSP-21020 Address Generators and Program Sequencer Interrupts Pin Name Type Function Reset DmpageDmts ClkiinCompute If conditionIf condition Compute DMIa, Mb = dregItalics Notation MeaningName Description Fixed-Point Floating-Point MRF MRB = MRF = MRB MRF = MRF = SAT MRF = SAT MRB= MRB MRF = MRF = RND MRF = RND MRB Shifter Shifter ImmediateFixed-Point Vector Address Hex FunctionIRQ3 IRQ2Grade Parameter Min Max Unit Parameter Test Conditions Min Max UnitReset Setup before Clkin High 29 + DT/2 Timing RequirementClkin Period 150 Clkin Width HighPulse Width TCK + Hold after Clkin HighTDTEX Clkin High to Timexp FLAG3-0INSetup before Clkin High 19 + 5DT/16 FLAG3-0OUTDelay from Clkin HighClkin High to FLAG3-0OUTEnable Clkin High to FLAG3-0OUTDisableMemory Interface Disable to Low Clkin High to Memory Interface Enable 25 + DT/2Timing Requirement Hold after Clkin HighSetup before Clkin High 14 + DT/4 XTS Delay after Address, Select 28 + 7DT/8XTS Delay after Low 16 + DT/2 Switching CharacteristicXACK Delay from Address + 7DT/8 XACK Delay from XRD Low + DT/2XACK Setup before Clkin High + DT/4 XACK Hold after Clkin High Switching CharacteristicMemory Read XACK Delay from Address, Select 27 + 7DT/8 XACK Delay from XWR Low 15 + DT/2Data Setup before XWR High + DT/2 Data Disable before XWR XRD Low + 3DT/8Memory Write TDI, TMS Setup before TCK High System Inputs Setup before TCK HighPulse Width 200 160 132 120 Switching Characteristic TDO Delay from TCK LowIeee 1149.1 Test Access Port Output disable time tDIS is the difference between Output Enable/DisableCapacitive Loading Type Pins Switch ExamplePin Ptotal = Pext + 5 V 3 Iddin typ = 0.210 + 1.15 = 1.36 W3 0.1 inches Bottom View Ribbon CableADSP-21020 ADSP-21020 PGA PIN Location Name Inches Millimeters Symbol MIN MAX Ordering Guide