Analog Devices ADSP-21020 TCK Period, TDI, TMS Setup before TCK High, TDO Delay from TCK Low

ADSP-21020

IEEE 1149.1 Test Access Port

			K/B/T Grade	K/B/T Grade	B/T Grade	K Grade
			20 MHz	25 MHz	30 MHz	33.3 MHz	Frequency Dependency*
Parameter			Min Max	Min Max	Min Max	Min Max	Min	Max	Unit
Timing Requirement:
tTCK	TCK Period		50	40	33	30	tCK		ns
tSTAP	TDI, TMS Setup before TCK High		5	5	5	5			ns
tHTAP	TDI, TMS Hold after TCK High		6	6	6	6			ns
tSSYS	System Inputs Setup before TCK High		7	7	7	7			ns
tHSYS	System Inputs Hold after TCK High		9	9	9	9			ns
tTRSTW	TRST	Pulse Width	200	160	132	120			ns
Switching Characteristic:
tDTDO	TDO Delay from TCK Low		15	15	15	15			ns
tDSYS	System Outputs Delay from TCK Low		26	26	26	26			ns

NOTES

*DT = tC – 50 ns

System Inputs = PMD47-0, PMACK, PMTS, DMD39-0, DMACK, DMTS, CLKIN, IRQ3 0, RESET, FLAG3-0, BR.

System Outputs = PMA23-0, PMS1-0, PMRD, PMWR, PMD47-0, PMPAGE, DMA31-0, DMS1-0, DMRD, DMWR, DMD39-0, DMPAGE, FLAG3-0, BG,

TIMEXP.

See the IEEE 1149.1 Test Access Port chapter of the ADSP-21020 User’s Manual for further detail.

–22– REV. C