Analog Devices ADSP-21020 manual

Page 29

ADSP-21020

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

U

PMD31

PMD35

PMD39

PMD40

EGND

PMD44

EGND

PMWR

EVDD

PMACK

EGND

RCOMP

EVDD

TCK

EGND

TMS

PMA20

PMA17

U

T

PMD27

PMD30

PMD32

PMD37

NC

PMD42

PMD45

PMTS

NC

NC

CLKIN

DMACK

DMWR

TRST

PMS1

PMA23

PMA19

EGND

T

S

PMD21

PMD26

PMD28

PMD34

PMD36

PMD41

PMD43

PMD47

PMRD

NC

DMRD

DMTS

TDI

PMPAGE

PMA22

PMA18

PMA14

PMA11

S

R

EGND

PMD23

PMD25

PMD29

PMD33

PMD38

IGND

PMD46

IVDD

RESET

IGND

TDO

PMS0

PMA21

PMA16

PMA15

PMA10

EGND

R

P

PMD18

PMD19

PMD22

PMD24

PMA12

PMA13

PMA9

PMA8

P

N

EVDD

PMD16

PMD17

PMD20

PMA7

PMA6

PMA5

EVDD

N

M

PMD12

PMD13

PMD14

PMD15

PMA2

PMA3

PMA4

PMA1

M

L

EGND

PMD11

PMD10

IGND

IGND

TIMEXP

PMA0

EGND

L

K

PMD9

PMD8

PMD7

PMD6

ADSP-21020

IRQ3

IRQ2

NC

EVDD

K

BOTTOM VIEW

J

EVDD

PMD5

PMD2

IVDD

(PINS UP)

IVDD

IRQ1

IRQ0

EVDD

J

H

PMD4

PMD3

DMD0

DMD1

FLAG1

FLAG0

FLAG2

EGND

H

G

EGND

NC

DMD3

IGND

IGND

DMA0

DMA1

FLAG3

G

F

PMD1

PMD0

DMD6

DMD9

DMA5

DMA4

DMA3

DMA2

F

E

EGND

DMD2

DMD10

DMD13

DMA10

DMA8

DMA7

DMA6

E

D

DMD4

DMD5

DMD11

DMD17

DMD22

DMD27

DMD31

DMD36

IVDD

DMS0

IGND

DMA27

DMA23

DMA19

DMA15

DMA12

DMA11

DMA9

D

C

DMD7

DMD8

DMD15

DMD20

DMD24

DMD28

DMD30

DMD35

DMD38

NC

DMS1

DMA31

DMA28

DMA24

DMA20

DMA18

DMA14

DMA13

C

B

DMD12

DMD14

DMD18

DMD21

DMD25

DMD26

DMD32

DMD33

DMD37

DMD39

DMS3

DMPAGE

DMA30

DMA26

DMA25

DMA21

DMA17

DMA16

B

A

DMD16

EGND

DMD19

EVDD

DMD23

EGND

DMD29

EVDD

DMD34

EGND

DMS2

EVDD

DMA29

EGND

DMA22

BG

BR

A

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

REV. C

–29–

Image 29

Contents ADSP-21020 ADSP-21020 Address Generators and Program Sequencer Interrupts Pin Name Type Function Dmpage ResetDmts ClkiinIf condition ComputeIf condition Compute DMIa, Mb = dregName Description Notation MeaningItalics Fixed-Point Floating-Point = MRB MRF = MRF = SAT MRF = SAT MRB MRF MRB = MRF= MRB MRF = MRF = RND MRF = RND MRB Shifter Shifter ImmediateVector Address Hex Function Fixed-PointIRQ3 IRQ2Parameter Test Conditions Min Max Unit Grade Parameter Min Max UnitTiming Requirement Reset Setup before Clkin High 29 + DT/2Clkin Period 150 Clkin Width HighTDTEX Clkin High to Timexp Hold after Clkin HighPulse Width TCK + FLAG3-0OUTDelay from Clkin High FLAG3-0INSetup before Clkin High 19 + 5DT/16Clkin High to FLAG3-0OUTEnable Clkin High to FLAG3-0OUTDisableClkin High to Memory Interface Enable 25 + DT/2 Memory Interface Disable to LowTiming Requirement Hold after Clkin HighXTS Delay after Address, Select 28 + 7DT/8 Setup before Clkin High 14 + DT/4XTS Delay after Low 16 + DT/2 Switching CharacteristicXACK Delay from XRD Low + DT/2 XACK Delay from Address + 7DT/8XACK Setup before Clkin High + DT/4 XACK Hold after Clkin High Switching CharacteristicMemory Read XACK Delay from XWR Low 15 + DT/2 XACK Delay from Address, Select 27 + 7DT/8Data Setup before XWR High + DT/2 Data Disable before XWR XRD Low + 3DT/8Memory Write System Inputs Setup before TCK High TDI, TMS Setup before TCK HighPulse Width 200 160 132 120 Switching Characteristic TDO Delay from TCK LowIeee 1149.1 Test Access Port Output Enable/Disable Output disable time tDIS is the difference betweenCapacitive Loading Example Type Pins SwitchPin Ptotal = Pext + 5 V 3 Iddin typ = 0.210 + 1.15 = 1.36 WBottom View Ribbon Cable 3 0.1 inchesADSP-21020 ADSP-21020 PGA PIN Location Name Inches Millimeters Symbol MIN MAX Ordering Guide