Cypress CY7C1447AV33, CY7C1443AV33 Partial Truth Table for Read/Write, Function CY7C1441AV33 2

CY7C1441AV33

CY7C1443AV33,CY7C1447AV33

Partial Truth Table for Read/Write

Function (CY7C1441AV33)[2, 7]	GW	BWE	BW	D	BW	C	BW	B	BW	A
Read	H	H	X		X		X		X
Read	H	L	H		H		H		H
Write Byte A (DQA, DQPA)	H	L	H		H		H		L
Write Byte B(DQB, DQPB)	H	L	H		H		L		H
Write Bytes A, B (DQA, DQB, DQPA, DQPB)	H	L	H		H		L		L
Write Byte C (DQC, DQPC)	H	L	H		L		H		H
Write Bytes C, A (DQC, DQA, DQPC, DQPA)	H	L	H		L		H		L
Write Bytes C, B (DQC, DQB, DQPC, DQPB)	H	L	H		L		L		H
Write Bytes C, B, A (DQC, DQB, DQA, DQPC,	H	L	H		L		L		L
DQPB, DQPA)
Write Byte D (DQD, DQPD)	H	L	L		H		H		H
Write Bytes D, A (DQD, DQA, DQPD, DQPA)	H	L	L		H		H		L
Write Bytes D, B (DQD, DQA, DQPD, DQPA)	H	L	L		H		L		H
Write Bytes D, B, A (DQD, DQB, DQA, DQPD,	H	L	L		H		L		L
DQPB, DQPA)
Write Bytes D, B (DQD, DQB, DQPD, DQPB)	H	L	L		L		H		H
Write Bytes D, B, A (DQD, DQC, DQA, DQPD,	H	L	L		L		H		L
DQPC, DQPA)
Write Bytes D, C, A (DQD, DQB, DQA, DQPD,	H	L	L		L		L		H
DQPB, DQPA)
Write All Bytes	H	L	L		L		L		L
Write All Bytes	L	X	X		X		X		X

Truth Table for Read/Write

Function (CY7C1443AV33)[2]

GW

BWE

BW

B

BW

A

Read

H

H

X

X

Read

H

L

H

H

Write Byte A - (DQA and DQPA)

H

L

H

L

Write Byte B - (DQB and DQPB)

H

L

L

H

Write All Bytes

H

L

L

L

Write All Bytes

L

X

X

X

Truth Table for Read/Write

Function (CY7C1447AV33)[2, 8]

GW

BWE

BW

X

Read

H

H

X

Read

H

L

All

= H

BW

Write Byte x – (DQx and DQPx)

H

L

L

Write All Bytes

H

L

All

= L

BW

Write All Bytes

L

X

X

Notes

7.Table only lists a partial listing of the byte write combinations. Any Combination of BWX is valid Appropriate write is done based on which byte write is active.

8.BWx represents any byte write signal BW[A..H].To enable any byte write BWx, a Logic LOW signal should be applied at clock rise.Any number of bye writes can be enabled at the same time for any given write.

Document #: 38-05357 Rev. *G Page 11 of 31

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